Patents by Inventor Norio Imaizumi

Norio Imaizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4942341
    Abstract: An object of the present invention is to provide a ramp generator which makes the scan start level by the sawtooth constant so as to obtain a proper interlace characteristic on the television picture plane. The present invention includes a clamping circuit which prevents the voltage from rising or falling so that a predetermined voltage value varies corresponding to the supply voltage.
    Type: Grant
    Filed: June 9, 1989
    Date of Patent: July 17, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Norio Imaizumi
  • Patent number: 4692670
    Abstract: A vertical deflection circuit for a CRT tube, with a so-called Mirror integration circuit, has an integration arrangement with a resistor and a capacitor, and a first amplifier for amplifying saw-tooth wave by the integration arrangement with a deflection coil coupled with output of the amplifier. A first feedback path is located between the deflection coil and the capacitor has been improved by a second feedback path between the deflection coil and input of the first amplifier. The second feedback path provides the sum of the parabolic voltage at the end of the deflection coil which is grounded through a second capacitor and a second resistor, and the saw-tooth wave voltage responsive to the current in the deflection coil to the first amplifier. The second feedback path provides the so-called S-shaped compensation on a screen so that a picture distortion, due to a non-arc face of a screen at peripheral portions, is compensated.
    Type: Grant
    Filed: November 4, 1985
    Date of Patent: September 8, 1987
    Assignee: Sanyo Electric Co.
    Inventor: Norio Imaizumi
  • Patent number: 4013903
    Abstract: An improved high speed switching circuit having at least an emitter grounded switching transistor, a first resistor connected between the base of said transistor and an input terminal, a second resistor connected between said base and the ground, a plurality of series connected diodes connected between the input terminal and the collector of said transistor has been disclosed. The ratio of the resistance of the first resistor to that of the second resistor is determined in accordance with the number of said series connected diodes.
    Type: Grant
    Filed: December 6, 1974
    Date of Patent: March 22, 1977
    Assignees: Tokyo Sanyo Electric Co., Ltd., Sanyo Electric Co., Ltd.
    Inventors: Jyunji Sakamoto, Norio Imaizumi, Eisuke Shiratani
  • Patent number: 3967216
    Abstract: A pulse generator which can be applied to a horizontal deflection circuit and/or a vertical deflection circuit of a television set and of which almost all parts can be easily manufactured in a single IC (Integrated Circuit) chip has been found. A capacitor in an integrator circuit is charged and discharged alternately. The voltage across said capacitor and a second voltage, which is controlled by said voltage across said capacitor, are compared with a predetermined voltage. According to the result of the comparison, the capacitor is charged or discharged and, thus, a pulse oscillation is provided.
    Type: Grant
    Filed: April 2, 1975
    Date of Patent: June 29, 1976
    Assignees: Tokyo Sanyo Electric Company, Ltd., Sanyo Electric Co., Ltd.
    Inventors: Jyunji Sakamoto, Eisuke Shiratani, Norio Imaizumi
  • Patent number: 3956661
    Abstract: An improved D. C. power source whose output voltage is independent of changes in temperature is disclosed. Compensation for changes in temperature is established by three features. For a change of the voltage drop in the forward direction between the base and the emitter of a transistor, a plurality of diodes provided in a bias circuit in the transistor are utilizied; for a change of the current amplification factor .beta. of a transistor, an additional transistor is attached to the transistor, and; for a change of the value of an emitter resistor connected between the emitter of the transistor and the ground, an external stable resistor is utilized. The D. C. power source of the present invention is, in particular, useful for an integrated circuit.
    Type: Grant
    Filed: November 6, 1974
    Date of Patent: May 11, 1976
    Assignees: Tokyo Sanyo Electric Co., Ltd., Sanyo Electric Co., Ltd.
    Inventors: Jyunji Sakamoto, Norio Imaizumi, Eisuke Shiratani