Abstract: An intracranial pressure estimating method includes: an acquisition step (S10) of acquiring time-series data on external ear canal pressure pulse waves of a subject; an analysis step (S12) of analyzing external ear canal pressure pulse wave data obtained by digitalizing the time-series data on the external ear canal pressure pulse waves, to calculate a first formant frequency of the external ear canal pressure pulse wave data; a correction step (S13) of correcting the calculated first formant frequency based on personal information on the subject to calculate a corrected value; and an estimation step (S14) of calculating an estimated value of an intracranial pressure based on the calculated corrected value.

Abstract: The semiconductor device includes: a gate electrode on a semiconductor substrate via a gate insulating film; an offset drain layer in the semiconductor substrate on one side of the gate electrode; a drain layer on the offset drain layer; and a source layer in the semiconductor substrate on another side of the gate electrode. The semiconductor device further includes: a protective film covering the semiconductor substrate; a field plate on the protective film, and having a portion above the offset drain layer; and a field plug connected to the field plate and in the protective film and above the offset drain layer, in such a manner as to avoid reaching the offset drain layer.

Abstract: An intracranial pressure estimating method includes: an acquisition step (S10) of acquiring time-series data on external ear canal pressure pulse waves of a subject; an analysis step (S12) of analyzing external ear canal pressure pulse wave data obtained by digitalizing the time-series data on the external ear canal pressure pulse waves, to calculate a first formant frequency of the external ear canal pressure pulse wave data; a correction step (S13) of correcting the calculated first formant frequency based on personal information on the subject to calculate a corrected value; and an estimation step (S14) of calculating an estimated value of an intracranial pressure based on the calculated corrected value.

Abstract: Although a conventional method can eliminate a mounting position deviation when left and right camera units only are taken into consideration, a problem is posed that deviation again occurs due to poor machining precision and assembly precision at the mounting surface between a camera unit and a member when a camera unit is mounted to a stay. According to this invention, mounting surfaces for mounting left and right imaging elements to a stay are provided to directly position left and right imaging elements to the stay, whereby built-up tolerance between components is reduced and the positional mounting precision between imaging elements is improved.

Abstract: Although a conventional method can eliminate a mounting position deviation when left and right camera units only are taken into consideration, a problem is posed that deviation again occurs due to poor machining precision and assembly precision at the mounting surface between a camera unit and a member when a camera unit is mounted to a stay. According to this invention, mounting surfaces for mounting left and right imaging elements to a stay are provided to directly position left and right imaging elements to the stay, whereby built-up tolerance between components is reduced and the positional mounting precision between imaging elements is improved.

Abstract: In a camera unit having a lens and an imaging device, the imaging device is fixed by means of a base plate, an elastic material, and a printed circuit board. The imaging device abuts on a first plane of the base plate, and the elastic material is sandwiched between the printed circuit board and a second plane opposite to the first plane of the base plate.

Abstract: It has been problematic that in a use environment of an image processing system in which temperature fluctuation or vibration occurs, it is highly probable that the subject of image recognition would not be imaged accurately because the relative position of an imaging device and a lens could be changed due to, for example, thermal stress resulting from a difference in the coefficient of linear expansion between a structural member that abuts on the imaging device and an adhesive and between the adhesive and the imaging device, stress resulting from vibration, or peeling of the adhesive resulting from deterioration of such adhesive. In a camera unit having a lens and an imaging device, the imaging device is fixed by means of a base plate, an elastic material, and a printed circuit board. The imaging device abuts on a first plane of the base plate, and the elastic material is sandwiched between the printed circuit board and a second plane opposite to the first plane of the base plate.

Abstract: According to a conventional technique, first, the positional relation between a lens and an imaging element is kept at each of left and right camera units, adjustment is made so as to eliminate the rotation-direction deviation of an imaging element from one surface of a member to which a lens and an imaging element are to be attached before fixing, and then that camera unit is attached to a reference member to thereby constitute a stereo camera. However, although this method can eliminate a mounting position deviation when left and right camera units only are taken into consideration, a problem is posed that deviation again occurs due to poor machining precision and assembly precision at the mounting surface between a camera unit and a member when a camera unit is mounted to a stay.

Abstract: A hot carrier lifetime of a MOS transistor is estimated, depending on model formulas: 1/?=1/?0+1/?b; ?b?1sub?mb·Idmb?2·exp(a/|Vbs|), where ? denotes a lifetime, Isub denotes a substrate current, Id denotes a drain current, Vbs denotes a substrate voltage, ?0 denotes a lifetime at the time the substrate voltage Vbs=0, ?b denotes a quantity representing deterioration of a lifetime at the time the substrate voltage |Vbs|>0, and mb and ‘a’ are model parameters. Furthermore, a parameter Age representing a cumulative stress quantity is calculated depending on model formulas: Age=Age0+Ageb; Ageb=?1/Hb[Isubmb·Id2?m]·exp(?a/|Vbs|)dt, where t denotes time, Hb is a model parameter, Age0 denotes a parameter representing a cumulative stress quantity at the time the substrate voltage Vbs=0, and Agebs denotes a quantity representing an increase of the cumulative stress quantity at the time the substrate voltage at |Vbs|>0.

Abstract: In calculating a substrate current Isub using a substrate current model equation expressed as Isub=(Ai/Bi)·(Vds?Vdsat)·Id·exp (?Bi·lc/(Vds?Vdsat)) (where Id, Vds and Vdsat are drain current, a drain voltage and a saturation drain voltage, respectively, of a MOS transistor, lc is a characteristic length, Ai is a model parameter and Bi is a given constant), the characteristic length lc is a function lc=lc[lc0+lc1·Vgd] (where lc0 and lc1 are model parameters) of a primary expression (lc0+lc1·Vgd) regarding a gate-drain voltage Vgd (=Vgs?Vds: Vgs is a gate voltage of the MOS transistor) of the MOS transistor.

Abstract: A hot carrier lifetime of a MOS transistor is estimated, depending on model formulas: 1/&tgr;=1/&tgr;0+1/&tgr;b; &tgr;b∝1sub−mb·Idmb−2·exp(a/|Vbs|), where &tgr; denotes a lifetime, Isub denotes a substrate current, Id denotes a drain current, Vbs denotes a substrate voltage, &tgr;0 denotes a lifetime at the time the substrate voltage Vbs=0, &tgr;b denotes a quantity representing deterioration of a lifetime at the time the substrate voltage |Vbs>0, and mb and ‘a’ are model parameters.

Abstract: A hot carrier lifetime of a MOS transistor is estimated depending on a hot carrier lifetime model expressed as t·∝Isub−m·Idm−2 where t is a lifetime, Isub is a substrate current, Id is a drain current, and m is a fitting parameter. When hot carrier degradation of the MOS transistor is simulated, a parameter Age representing cumulative stress quantity with respect to the MOS transistor is calculated by a model formula expressed as Age∝∫[Isubm·Id2−m]dt where t is time. As a result, a lifetime under a condition to cause maximum hot carrier degradation is estimated accurately, and a lifetime in actual use can be estimated accurately. Moreover, a hot carrier lifetime parameter can be calculated in a short time with small numbers of transistors.

Abstract: A hot carrier lifetime of a MOS transistor is estimated depending on a hot carrier lifetime model expressed as t·∝Isub−m·Idm−2 where t is a lifetime, Isub is a substrate current, Id is a drain current, and m is a fitting parameter. When hot carrier degradation of the MOS transistor is simulated, a parameter Age representing cumulative stress quantity with respect to the MOS transistor is calculated by a model formula expressed as Age ∝∫[Isubm·Id2−m]dt where t is time. As a result, a lifetime under a condition to cause maximum hot carrier degradation is estimated accurately, and a lifetime in actual use can be estimated accurately. Moreover, a hot carrier lifetime parameter can be calculated in a short time with small numbers of transistors.

Abstract: An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.

Abstract: An electric field changing in the form of a ramp waveform with the passage of time is applied to an oxide layer, and the electric current densities applied to the oxide layer at measuring points of time are measured. The electric current densities applied until the oxide layer is broken down, are integrated with respect to time, thus obtaining a total electric charge amount Qbd used up to the breakdown of the oxide layer. The total electric charge amount Qbd is divided by each of the electric current densities at the measuring points of time, thus obtaining each of the estimated values of oxide layer lifetime at the time when it is supposed that each of the electric current densities at the points of time was constantly applied. Using the field intensities and the lifetime estimated values at the common measuring points of time, there is determined a regression line in which the oxide layer lifetime estimated values are expressed in the form of a function of the field intensities.

Abstract: A dispersion solution of colloidal silica is coated on a pigment layer composing a filter layer and then dried. Thus, the state of the front surface of the filter layer (pigment layer) is controlled without affecting the filter layer (pigment layer). A phosphor layer is formed on the filter layer (pigment layer).

Abstract: A thin film phototransistor is provided having a field effect transistor structure where at least one end of the gate electrode is not overlapped with an electrode neighboring the end. Such a thin film phototransistor has: (1) a function as a photosensor and a switching function; (2) a high input impedance; (3) a voltage control function; and (4) a high photocurrent ON/OFF ratio. This thin film phototransistor can be used independently or together with a thin film transistor for picture elements of a one-dimensional or two-dimensional photosensor array, producing satisfactory results.

Abstract: A color cathode ray tube having a vacuum envelope including a panel with an inner surface, a neck and a funnel connecting the neck to the panel, a phosphor screen provided on the inner surface of the panel for emitting visible light, an electron gun provided in the neck for emitting a plurality of electron beams towards the phosphor screen, a shadow mask provided adjacent to the phosphor screen with a predetermined distance from the phosphor screen, and a porous layer, which is formed on a surface of the shadow mask facing to the electron gun. The porous layer is formed by using metal alkoxide solution which contains black color pigment containing both of cobalt oxide and nickel oxide.

Abstract: According to the present invention, there is provided a method for forming a color tube phosphor screen comprising the steps of forming a light-absorbing matrix having holes on a faceplate, coating a silica colloidal solution or an alumina colloidal solution containing a multivalent metal ion in said holes and washing said holes, and forming phosphor layers of three colors in said washed holes. The color tube phosphor screen formed through the method of the present invention has no phosphor residual, especially pigment residual.

Abstract: A photoresist film containing a phosphate of a formalin condensate of diazodiphenylamine, 2.5-bis(4'-azide-2'-sulphobenzilidene) cyclopentanone Na, polyvinylalcohol, and polyvinylpyrrolidone is formed on the inner surface of a faceplate. The photoresist film is hardened by light exposure using a point or linear light source, which is essentially a circular light source, via a shadow mask having a large number of apertures. A light absorbing film is formed on this photoresist film. Then the hardened photoresist film and the light absorbing film on top of it are removed using a peeling agent.