Patents by Inventor Noritsugu Isoi

Noritsugu Isoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory device with switching element for isolating bit lines during testing
    Patent number: 6249468
    Abstract: A semiconductor recording device includes two transistors connected to two bit lines, respectively, that are turned OFF by a retention test signal during a retention test. One of the bit lines is put into high impedance with the help of a write driver, and “0” is output to the other bit line. Therefore, charge at H-level is not supplied to the bit lines during the retention test, so that a memory cell having a faulty connection will not temporarily retain H-level data.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: June 19, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuhiro Kan, Noritsugu Isoi, Hiroaki Tamura