Patents by Inventor Noriyoshi Hagino

Noriyoshi Hagino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7359678
    Abstract: The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the subsequent stage amplifiers are carried out during shifting into the reception mode in a state that the low noise amplifier is deactivated and the dummy amplifier is activated. Thereby, the invention achieves to suppress generation of the DC offsets resulting from the leakage noises of the local oscillator during shifting into the reception mode, and to enhance the reception sensitivity.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: April 15, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Norio Hayashi, Noriyoshi Hagino, Toshiki Matsui, Kazuo Watanabe, Satoshi Tanaka
  • Publication number: 20050186927
    Abstract: The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the subsequent stage amplifiers are carried out during shifting into the reception mode in a state that the low noise amplifier is deactivated and the dummy amplifier is activated. Thereby, the invention achieves to suppress generation of the DC offsets resulting from the leakage noises of the local oscillator during shifting into the reception mode, and to enhance the reception sensitivity.
    Type: Application
    Filed: April 22, 2005
    Publication date: August 25, 2005
    Inventors: Norio Hayashi, Noriyoshi Hagino, Toshiki Matsui, Kazuo Watanabe, Satoshi Tanaka
  • Patent number: 6909882
    Abstract: The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the subsequent stage amplifiers are carried out during shifting into the reception mode in a state that the low noise amplifier is deactivated and the dummy amplifier is activated. Thereby, the invention achieves to suppress generation of the DC offsets resulting from the leakage noises of the local oscillator during shifting into the reception mode, and to enhance the reception sensitivity.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: June 21, 2005
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Norio Hayashi, Noriyoshi Hagino, Toshiki Matsui, Kazuo Watanabe, Satoshi Tanaka
  • Publication number: 20020094788
    Abstract: The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the subsequent stage amplifiers are carried out during shifting into the reception mode in a state that the low noise amplifier is deactivated and the dummy amplifier is activated. Thereby, the invention achieves to suppress generation of the DC offsets resulting from the leakage noises of the local oscillator during shifting into the reception mode, and to enhance the reception sensitivity.
    Type: Application
    Filed: January 3, 2002
    Publication date: July 18, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Norio Hayashi, Noriyoshi Hagino, Toshiki Matsui, Kazuo Watanabe, Satoshi Tanaka