Patents by Inventor Noriyoshi Kohama

Noriyoshi Kohama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11066084
    Abstract: Provided is a railway vehicle air-conditioning duct that is capable of achieving a more uniform in-cabin temperature distribution through more appropriate volume distribution of conditioned air. A railway vehicle air-conditioning duct that supplies conditioned air generated by an air conditioner into a cabin and that extends in a vehicle length direction at a vehicle ceiling part has: a main duct; a chamber duct; a branch duct; and a guide part. The guide part is lower in height than the main duct, extends to a branch duct from the main duct or a partition wall in the main duct in a vehicle width direction, and supplies to the branch duct a portion of the conditioned air supplied to the main duct.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: July 20, 2021
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Yasuo Onitake, Noriyoshi Kohama
  • Publication number: 20190315378
    Abstract: Provided is a railway vehicle air-conditioning duct that is capable of achieving a more uniform in-cabin temperature distribution through more appropriate volume distribution of conditioned air. A railway vehicle air-conditioning duct that supplies conditioned air generated by an air conditioner into a cabin and that extends in a vehicle length direction at a vehicle ceiling part has: a main duct; a chamber duct; a branch duct; and a guide part. The guide part is lower in height than the main duct, extends to a branch duct from the main duct or a partition wall in the main duct in a vehicle width direction, and supplies to the branch duct a portion of the conditioned air supplied to the main duct.
    Type: Application
    Filed: March 14, 2017
    Publication date: October 17, 2019
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Yasuo ONITAKE, Noriyoshi KOHAMA
  • Patent number: 8957300
    Abstract: A substrate 1 for a photoelectric conversion device includes a first transparent conductive layer 5 formed on at least a part of the surface region of a transparent substrate 3, the first transparent conductive layer 5 having at least an opening portion 7 exposing the substrate 3.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: February 17, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhito Nishimura, Takashi Hayakawa
  • Patent number: 8258596
    Abstract: To provide a stacked photoelectric conversion device and a method for producing the same, in which an interlayer is provided between photoelectric conversion layers to obtain an effect of controlling the amount of incidence light, and carrier recombination at an interface between the interlayer and a semiconductor layer is decreased to enhance photoelectric conversion efficiency. The stacked photoelectric conversion device of the present invention comprises a plurality of silicon-based photoelectric conversion layers having a p-i-n structure stacked, wherein at least a pair of adjacent photoelectric conversion layers have an interlayer of a silicon nitride therebetween, the pair of the photoelectric conversion layers are electrically connected with each other, and a p-type silicon-based semiconductor layer constituting a part of the photoelectric conversion layer and contacting the interlayer contains a nitrogen atom.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: September 4, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Takanori Nakano
  • Publication number: 20120080774
    Abstract: The semiconductor of the present invention has iron sulfide and a forbidden band control element contained in the iron sulfide. The forbidden band control element has a property capable of controlling the forbidden band of iron sulfide on the basis of the number density of the forbidden band control element in the iron sulfide. An n-type semiconductor is manufactured by incorporating a group 13 element of the IUPAC system into iron sulfide. Moreover, a p-type semiconductor is manufactured by incorporating a group Ia element into iron sulfide. A semiconductor junction device or a photoelectric converter is manufactured by using the n-type semiconductor and the p-type semiconductor.
    Type: Application
    Filed: December 7, 2011
    Publication date: April 5, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yoshiyuki NASUNO, Noriyoshi Kohama, Kazuhito Nishimura
  • Patent number: 8137046
    Abstract: A substrate transfer apparatus comprising: a plurality of floating-transfer guide plates adjacent to each other, each of guide plates having a plurality of floating gas ejecting holes; a gas supplying source; a tray to mount a substrate to be transferred, and that is floated by the floating gas; and a transfer arm for transferring the floated tray from the guide plate to the adjacent other guide plate, wherein the tray includes both side edges, and a contact/engagement portion formed at the respective both side edges for the transfer arm, each of the transfer arms including a base portion that can horizontally reciprocate along a rail provided so as to be parallel to the transfer direction, a guide portion provided to the base portion, that can horizontally reciprocate in a direction orthogonal to the transfer direction, and an arm portion provided to the guide portion, that can horizontally reciprocate in the direction parallel to the transfer direction.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: March 20, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsushi Kishimoto, Yusuke Fukuoka, Noriyoshi Kohama, Yusuke Ozaki
  • Patent number: 8093684
    Abstract: The semiconductor of the present invention has iron sulfide and a forbidden band control element contained in the iron sulfide. The forbidden band control element has a property capable of controlling the forbidden band of iron sulfide on the basis of the number density of the forbidden band control element in the iron sulfide. An n-type semiconductor is manufactured by incorporating a group 13 element of the IUPAC system into iron sulfide. Moreover, a p-type semiconductor is manufactured by incorporating a group Ia element into iron sulfide. A semiconductor junction device or a photoelectric converter is manufactured by using the n-type semiconductor and the p-type semiconductor.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: January 10, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhito Nishimura
  • Publication number: 20100059847
    Abstract: To provide a stacked photoelectric conversion device and a method for producing the same, in which an interlayer is provided between photoelectric conversion layers to obtain an effect of controlling the amount of incidence light, and carrier recombination at an interface between the interlayer and a semiconductor layer is decreased to enhance photoelectric conversion efficiency. The stacked photoelectric conversion device of the present invention comprises a plurality of silicon-based photoelectric conversion layers having a p-i-n structure stacked, wherein at least a pair of adjacent photoelectric conversion layers have an interlayer of a silicon nitride therebetween, the pair of the photoelectric conversion layers are electrically connected with each other, and a p-type silicon-based semiconductor layer constituting a part of the photoelectric conversion layer and contacting the interlayer contains a nitrogen atom.
    Type: Application
    Filed: November 15, 2007
    Publication date: March 11, 2010
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Takanori Nakano
  • Publication number: 20100034624
    Abstract: A substrate transfer apparatus comprising: a plurality of floating-transfer guide plates adjacent to each other, each of guide plates having a plurality of floating gas ejecting holes; a gas supplying source; a tray to mount a substrate to be transferred, and that is floated by the floating gas; and a transfer arm for transferring the floated tray from the guide plate to the adjacent other guide plate, wherein the tray includes both side edges, and a contact/engagement portion formed at the respective both side edges for the transfer arm, each of the transfer arms including a base portion that can horizontally reciprocate along a rail provided so as to be parallel to the transfer direction, a guide portion provided to the base portion, that can horizontally reciprocate in a direction orthogonal to the transfer direction, and an arm portion provided to the guide portion, that can horizontally reciprocate in the direction parallel to the transfer direction.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 11, 2010
    Inventors: Katsushi KISHIMOTO, Yusuke FUKUOKA, Noriyoshi KOHAMA, Yusuke OZAKI
  • Publication number: 20070163635
    Abstract: The semiconductor of the present invention has iron sulfide and a forbidden band control element contained in the iron sulfide. The forbidden band control element has a property capable of controlling the forbidden band of iron sulfide on the basis of the number density of the forbidden band control element in the iron sulfide. An n-type semiconductor is manufactured by incorporating a group IIIb element into iron sulfide. Moreover, a p-type semiconductor is manufactured by incorporating a group Ia element into iron sulfide. A semiconductor junction device or a photoelectric converter is manufactured by using the n-type semiconductor and the p-type semiconductor.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 19, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhito Nishimura
  • Publication number: 20070151596
    Abstract: A substrate 1 for a photoelectric conversion device includes a first transparent conductive layer 5 formed on at least a part of the surface region of a transparent substrate 3, the first transparent conductive layer 5 having at least an opening portion 7 exposing the substrate 3.
    Type: Application
    Filed: January 7, 2005
    Publication date: July 5, 2007
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhiko Nishimura, Takashi Hayakawa