Patents by Inventor Noriyuki Kirikae

Noriyuki Kirikae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170152405
    Abstract: A highly reliable adhesive film that mitigates curving caused by the difference in linear expansion coefficients between the adherends, without adding large stress on the adherends. The adhesive film includes: (A) a curable resin with a structure containing an alicyclic hydrocarbon with 5 to 8 carbons, which is substituted by at least 4 alkyl groups of 4 to 12 carbons, which further contains at least one curable part; and (B) a polymerization initiator with a one-hour half-life temperature of 140° C. or higher. Further, an adhesive film with dicing tape, which includes such an adhesive film laminated on to a dicing tape, is provided.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 1, 2017
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masami AOYAMA, Noriyuki KIRIKAE
  • Publication number: 20170152418
    Abstract: A maleimide film that utilizes maleimide resin, which shows high heat history resistance and is highly reliable, and an adhesive film with dicing tape including the maleimide film laminated on to a dicing tape. Specifically, it is a maleimide adhesive film, which includes a maleimide resin and a radical initiator with a one-hour half-life temperature of 140° C. or higher. Preferably, it is a maleimide adhesive film, wherein the maleimide resin is of a specific structure. Further, an adhesive film with dicing tape, which included such a maleimide adhesive film laminated on to a dicing tape, is provided.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 1, 2017
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masami AOYAMA, Noriyuki KIRIKAE
  • Patent number: 9101062
    Abstract: A highly heat conductive metal-clad laminate, which may be included in a highly heat conductive polyimide film, has a metal layer on one or both sides of an insulating layer which has a heat conductive filler-filled polyimide layer. The insulating layer of the highly heat conductive metal-clad laminate or the highly heat conductive polyimide film having the filler-filled polyimide layer is characterized in that the content of the heat conductive filler in the filler-filled polyimide layer is 20-80 wt %, the heat conductive filler contains a plate-like filler with an average length DL of 0.1-15 ?m and a spherical filler with an average particle diameter DR of 0.05-10 ?m, DL and DR satisfy the relationship DL>DR/2, no heat conductive filler of 30 ?m or more is contained, and the coefficient of thermal expansion is in the range of 10-30 ppm/K.
    Type: Grant
    Filed: September 7, 2009
    Date of Patent: August 4, 2015
    Assignee: NIPPON STEEL & SUMIKIN CHEMICAL CO., LTD.
    Inventors: Eijiro Aoyagi, Hongyuan Wang, Noriyuki Kirikae, Katsufumi Hiraishi
  • Publication number: 20110165410
    Abstract: Provided is a highly heat conductive metal-clad laminate which shows heat resistance, dimensional stability, workability, and adhesiveness and excellent thermal conductivity properties. Also provided is a highly heat conductive polyimide film. The highly heat conductive metal-clad laminate has a metal layer on one or both sides of an insulating layer which has a heat conductive filler-filled polyimide layer. The insulating layer of the highly heat conductive metal-clad laminate or the highly heat conductive polyimide film having the filler-filled polyimide layer is characterized in that the content of the heat conductive filler in the filler-filled polyimide layer is 20-80 wt %, the heat conductive filler contains a plate-like filler with an average length DL of 0.1-15 ?m and a spherical filler with an average particle diameter DR of 0.
    Type: Application
    Filed: September 7, 2009
    Publication date: July 7, 2011
    Inventors: Eijiro Aoyagi, Hongyuan Wang, Noriyuki Kirikae, Katsufumi Hiraishi
  • Patent number: 6969919
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 ?m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20050003577
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 ?m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: June 10, 2004
    Publication date: January 6, 2005
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Patent number: 6774496
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: August 10, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Patent number: 6716674
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: April 6, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20030153121
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: March 18, 2003
    Publication date: August 14, 2003
    Applicant: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20030049883
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: September 11, 2001
    Publication date: March 13, 2003
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae