Patents by Inventor Noriyuki Oroku

Noriyuki Oroku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9063356
    Abstract: An object of the present invention is to provide a method for repairing a display device according to which a wide variety of regions can be repaired in various ways using various materials, as well as an apparatus for the same. The present invention provides a repairing apparatus for repairing a pattern defect on a surface of a substrate in a display device where an electronic circuit pattern having the above described pattern defect is formed, characterized by having a plasma irradiation means for repairing the above described pattern defect through local irradiation of a region including the above described pattern defect with plasma.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: June 23, 2015
    Assignees: JAPAN DISPLAY INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Takeshi Arai, Nobuaki Nakasu, Tadao Edamura, Noriyuki Oroku
  • Patent number: 8035522
    Abstract: A circuit chip having a loop-shaped antenna coil on a main surface and a tag sheet having an antenna pattern on a main surface are prepared, and the circuit chip is mounted on the main surface of the tag sheet so as not to place over the antenna pattern. The circuit chip is placed closely to the antenna pattern, and at least the half of the main surface is desirably faced against the antenna pattern. Thus, signals and/or power can be securely exchanged between the circuit chip (or antenna coil) and the antenna pattern. Therefore, a high-performance and rigid RFID tag can be obtained by roughly aligning the circuit chip and the tag sheet.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 11, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Noriyuki Oroku, Naoya Kanda, Hidehiko Kando, Kouichi Uesaka
  • Patent number: 8009047
    Abstract: For protecting information stored in an RFID chip and ensuring its authenticity, radio communication between the RFID chip and an external terminal is positively interrupted when a seal type RFID tag including the RFID chip is peeled from an adherend, while ensuring solidity integrity when the RFID tag is put on the adherend. In the seal type RFID tag which includes the RFID chip fixed on a mounting surface of a base member having an adhesive layer applied thereto and which is put on the adherend by using the adhesive layer, an antenna formed on a main surface of the RFID chip is embedded in adhesive layers together with the RFID chip and an adhesive bonding strength between the antenna and the adhesive layer is made greater than a joining strength between the antenna and the RFID chip.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: August 30, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Kanda, Noriyuki Oroku
  • Patent number: 7861938
    Abstract: The present invention provides a sheet-shaped material containing an RFID thread. The RFID thread comprises a strip-shaped film onto one side of which a semiconductor chip containing plural bits of memory and provided with an antenna wire is bonded. The strip-shaped film has plural openings formed therethrough except where the semiconductor chip is bonded. Since intertwining occurs between paper fibers via the openings, the RFID thread is strongly fixed in the paper.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: January 4, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Noriyuki Oroku, Hidehiko Kando
  • Publication number: 20100062182
    Abstract: An object of the present invention is to provide a method for repairing a display device according to which a wide variety of regions can be repaired in various ways using various materials, as well as an apparatus for the same. The present invention provides a repairing apparatus for repairing a pattern defect on a surface of a substrate in a display device where an electronic circuit pattern having the above described pattern defect is formed, characterized by having a plasma irradiation means for repairing the above described pattern defect through local irradiation of a region including the above described pattern defect with plasma.
    Type: Application
    Filed: July 23, 2009
    Publication date: March 11, 2010
    Inventors: Takeshi ARAI, Nobuaki NAKASU, Tadao EDAMURA, Noriyuki OROKU
  • Publication number: 20090096583
    Abstract: For protecting information stored in an RFID chip and ensuring its genuineness, radio communication between the RFID chip and an external terminal is positively intercepted when a seal type RFID tag including the RFID chip is peeled from an adherend, while ensuring solidity when the RFID tag is put on the adherend. In the seal type RFID tag which includes the RFID chip fixed on a mounting surface of a base member having an adhesive layer applied thereto and which is put on the adherend by using the adhesive layer, an antenna formed on a main surface of the RFID chip is embedded in adhesive layers together with the RFID chip and an adhesive bonding strength between the antenna and the adhesive layer is made greater than a joining strength between the antenna and the RFID chip.
    Type: Application
    Filed: September 16, 2008
    Publication date: April 16, 2009
    Inventors: Naoya Kanda, Noriyuki Oroku
  • Publication number: 20090090784
    Abstract: The present invention provides a sheet-shaped material containing an RFID thread. The RFID thread comprises a strip-shaped film onto one side of which a semiconductor chip containing plural bits of memory and provided with an antenna wire is bonded. The strip-shaped film has plural openings formed therethrough except where the semiconductor chip is bonded. Since intertwining occurs between paper fibers via the openings, the RFID thread is strongly fixed in the paper.
    Type: Application
    Filed: August 5, 2008
    Publication date: April 9, 2009
    Inventors: Noriyuki Oroku, Hidehiko Kando
  • Publication number: 20090079574
    Abstract: A circuit chip having a loop-shaped antenna coil on a main surface and a tag sheet having an antenna pattern on a main surface are prepared, and the circuit chip is mounted on the main surface of the tag sheet so as not to place over the antenna pattern. The circuit chip is placed closely to the antenna pattern, and at least the half of the main surface is desirably faced against the antenna pattern. Thus, signals and/or power can be securely exchanged between the circuit chip (or antenna coil) and the antenna pattern. Therefore, a high-performance and rigid RFID tag can be obtained by roughly aligning the circuit chip and the tag sheet.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Inventors: Noriyuki Oroku, Naoya Kanda, Hidehiko Kando, Kouichi Uesaka
  • Publication number: 20080106183
    Abstract: A display panel comprises an anode substrate provided with light emitting members that emit light under irradiation of electron beams, a cathode substrate provided with electron emitting elements, and spacer members arranged inside the display panel. Here, the resistivity between the anode substrate and the spacer members is larger than the resistivity between the cathode substrate and the spacer members.
    Type: Application
    Filed: December 12, 2005
    Publication date: May 8, 2008
    Inventors: Noriyuki Oroku, Yuuichi Kijima, Yuuichi Inoue
  • Publication number: 20080024051
    Abstract: An image display device includes a vacuum envelope which is constituted of a rectangular back substrate which arranges electron sources in the vicinity of intersecting portions of image signal electrodes and scanning signal electrodes, a rectangular face substrate which includes phosphor layers and anodes, and a frame body which is connected to peripheral regions of the respective substrates. A frame width size of a frame body is set such that the long-side frame width is larger than the short-side frame width thus realizing the miniaturization and the reduction of weight of the image display device.
    Type: Application
    Filed: July 30, 2007
    Publication date: January 31, 2008
    Inventors: Hiroyuki Tachihara, Akira Hatori, Noriyuki Oroku
  • Publication number: 20070200476
    Abstract: The present invention provides a display device allowing the quality and reliability to be improved by preventing the occurrence of vacuum leak attributable to dislocation which may be caused by preliminary baking and panel sealing. A display device in which the end surfaces of a support body 13 are hermetically bonded to a front substrate 2 and a rear substrate 1 by sealing members 4. In the display device, the support body 13 is formed by bonding together a plurality of support body members 13X1, 13X2, 13Y1 and 13Y2, and adjacent support body members are bonded by using a first bonding member 141 for bonding a central area of each bonding surface and a second bonding member 142 for bonding a marginal area around the central area. The softening temperature of the first bonding member is set higher than the softening temperature of the second bonding member.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Inventors: Yuuichi Kijima, Noriyuki Oroku, Shigemi Hirasawa, Hiroyuki Tachihara, Ikuo Yamaba
  • Publication number: 20070114926
    Abstract: An image display device is constituted such that a back substrate on which image signal lines, scanning signal lines and electron sources are arranged and a face substrate which has phosphor layers are hermetically sealed to each other by way of a frame body using a sealing material, and the inside of the image display device is formed into a vacuum. A length LSK of a second sealing region into which scanning signal lines hermetically penetrate is set larger than a length LDK of a first sealing region into which thin-film image signal lines hermetically penetrate and hence, it is possible to suppress the decrease of the degree of vacuum.
    Type: Application
    Filed: October 31, 2006
    Publication date: May 24, 2007
    Inventors: Yuuichi Kijima, Yoshiyuki Kaneko, Kenji Kato, Noriyuki Oroku, Toshio Sasamoto
  • Publication number: 20060226762
    Abstract: In a method for manufacturing an image display apparatus, in which a rear substrate and a front substrate are adhered and fixed at a predetermined positional relationship, with high productivity, two (2) lines of seal flit glass FT are applied on inner surfaces of the rear substrate SUB1 and the front substrate SUB2, where a sealing frame FR is bonded and fixed, along the frame sides, on both sides of an abutting surface (i.e., a vacuum side and an atmospheric side) of the sealing frame FR, and are baked, provisionally. The sealing frame FR is disposed between those two (2) lines of seal flit glass FT, and is baked, thereby melting down the seal flit glass for bonding and fixing thereof.
    Type: Application
    Filed: March 6, 2006
    Publication date: October 12, 2006
    Inventors: Toshio Sasamoto, Noriyuki Oroku, Yoshie Kodera
  • Publication number: 20060186788
    Abstract: An image display device according to the present invention includes a front-surface panel SUB2, a rear-surface panel SUB1, and an outer frame FR. Here, the front-surface panel SUB2, the rear-surface panel SUB1, and the outer frame FR are fixed to each other by frit glass FT. Also, an internal hermetically-closed space surrounded by the front-surface panel SUB2, the rear-surface panel SUB1, and the outer frame FR is maintained at a lower pressure than that of the outside. Moreover, the outer frame FR is formed of a sintered body of glass paste.
    Type: Application
    Filed: February 9, 2006
    Publication date: August 24, 2006
    Applicant: Hitachi, Ltd.
    Inventors: Toshio Sasamoto, Shigemi Hirasawa, Yuuichi Kijima, Noriyuki Oroku
  • Publication number: 20060132035
    Abstract: The seal frame MFL interposed between the cathode panel PNL1 and the anode panel PNL2 along their peripheral portion is integrally formed with curved recesses CUV, concave in cross section, in its bonding surfaces in contact with the cathode panel PNL1 and the anode panel PNL2. This construction keeps the frit glass FG within the recesses CUV, preventing it from being squeezed out in the widthwise direction of the seal frame MFL. This in turn makes less likely the formation of penetrating holes in the frit glass, which will lead to a leakage. Thus, an airtightness improves, maintaining the vacuum level in the hermetically enclosed space, preventing a vacuum leakage caused by improper bonding between the two substrates, and realizing a highly reliable image display apparatus.
    Type: Application
    Filed: December 21, 2005
    Publication date: June 22, 2006
    Inventors: Yuichi Sawai, Osamu Shiono, Motoyuki Miyata, Hiroyuki Akata, Takashi Naito, Noriyuki Oroku
  • Patent number: 7057283
    Abstract: A semiconductor apparatus in which flip chip bonding is enabled without any underfill, and which comprises a semiconductor device, an electrically insulating layer formed on the semiconductor device by mask-printing an electrically insulating material containing particles, and an external connection terminal formed on the electrically insulating layer and electrically connected with an electrode of the semiconductor device. The electrically insulating layer is formed with a thickness so as to provide ?-ray shielding of the semiconductor device.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 6, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kosuke Inoue, Hiroyuki Tenmei, Yoshihide Yamaguchi, Noriyuki Oroku, Hiroshi Hozoji, Shigeharu Tsunoda, Madoka Minagawa, Naoya Kanda, Ichiro Anjo, Asao Nishimura, Akira Yajima, Kenji Ujiie
  • Publication number: 20060061256
    Abstract: In order to obtain an image display device with ease and high reliability in which a space between a display panel and a rear panel opposite thereto is sealed with a frame spacer, in the present invention, a step is formed by partially cutting at least one inner wall of ends connected to each other of a plurality of glass members constituting the frame spacer, or the glass members are connected through a metal fitting which is inserted between ends connected to each other of the glass members.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 23, 2006
    Inventors: Noriyuki Oroku, Takashi Naito, Yuichi Sawai, Tetsu Ohishi
  • Patent number: 7015071
    Abstract: A method of manufacture of a semiconductor device can speedily peel extremely thin chips which are laminated to an adhesive tape without generating cracks or chippings. In this regard, the head of a vibrator is brought into contact with a back surface of an adhesive tape to which a plurality of semiconductor chips are laminated. By applying longitudinal vibrations having a frequency of 1 kHz to 100 kHz and an amplitude of 1 ?m to 50 ?m, the chip is peeled from the adhesive tape. In applying the longitudinal vibrations to the adhesive tape, a tension in a horizontal direction is applied to the adhesive tape.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: March 21, 2006
    Assignees: Renesas Technology Corp., Renesas Eastern Japan Semiconductor, INC
    Inventors: Takashi Wada, Noriyuki Oroku, Hiroshi Maki
  • Patent number: 6930388
    Abstract: A semiconductor device is provided which enables a flip chip connection without use of underfill. The semiconductor device includes a semiconductor element having circuit electrodes and a circuit surface coated with a protecting film. A stress relaxation layer is provided by coating a cured thermoplastic resin onto the protecting film of the circuit surface in a manner which leaves the circuit electrodes exposed and curing it and having an inclination in the edge portion thereof. A wiring layer with wirings is connected to each of the circuit electrodes and disposed so as to make an electrical connection from the circuit electrodes, via the edge portion of the stress relaxation layer, and to a desired portion on the surface of the stress relaxation layer. A protecting film is provided thereon, and an external connection terminal is also provided.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: August 16, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Yoshihide Yamaguchi, Hiroyuki Tenmei, Kosuke Inoue, Noriyuki Oroku, Hiroshi Hozoji, Shigeharu Tsunoda, Naoya Kanda, Madoka Minagawa, Ichiro Anjo, Asao Nishimura, Kenji Ujiie, Akira Yajima
  • Patent number: 6869008
    Abstract: In the conventional bump forming method that can be applied to a semiconductor device in which a large number of bumps are required to be formed, there are various limitations on the material of which the bumps are made, due to enough cubic volume of bumps and to small scattering of the bump height. According to the invention, solder balls and a tool having a large number of through-holes are used, and under the condition that the through-holes of the tool are aligned with the pads of the semiconductor device, the solder balls are charged into the through-holes, pressed to be fixed on the pads, and then reflowed to form bumps.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: March 22, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kosuke Inoue, Asao Nishimura, Takamichi Suzuki, Teru Fujii, Masayuki Morishima, Yasuyuki Nakajima, Noriyuki Oroku