Abstract: Provided is an optical lens formed by integrally molding a lens part that is an optically effective portion and has a light incidence/emission surface, and a lens edge part that is an optically ineffective portion and has a surface thereof except the light incidence/emission surface. The lens edge part includes a non-transparent region in part or all thereof, the lens part and the lens edge part include a thermoplastic resin, and the non-transparent region in the lens edge part contains a total of 0.1-5 mass % of one or more of a black dye and a black pigment.

Abstract: A polycarbonate resin having a high refractive index, a low Abbe number and a high moisture and heat resistance is provided. In an embodiment, a polycarbonate resin including a structural unit represented by general formula (1) below is provided.

Abstract: An LSI which makes scan testing possible without compromising security is provided. Flip-flops that constitute a scan chain are reset when scan testing is initiated or terminated by the edges of a mode signal for switching between normal operations and scan testing. In addition, during scan testing, internal memory means is made inaccessible. Further, a dummy flip-flop that operates only during scan testing is connected to the scan chain, and shifting out by the scan chain during normal operations is made impossible.

Abstract: Methods and apparatus for dynamically (AC) testing a target circuit within a main circuit include: providing respective sets of input latches from among a plurality of latches of the main circuit; reconfiguring connections of at least some of the input latches from normal connections within the main circuit such that each set of input latches is connected in series and directs an input bit stream from an associated source node into an associated input node of the target circuit; scanning a plurality of sets of input bits into the respective sets of input latches such that each latch of each set of input latches contains a respective bit of an associated one of the sets of input bits; and scanning each of the sets of input bits serially into the respective input nodes of the target circuit at a sufficiently high frequency to dynamically test the target circuit.

Abstract: An LSI which makes scan testing possible without compromising security is provided. Flip-flops that constitute a scan chain are reset when scan testing is initiated or terminated by the edges of a mode signal for switching between normal operations and scan testing. In addition, during scan testing, internal memory means is made inaccessible. Further, a dummy flip-flop that operates only during scan testing is connected to the scan chain, and shifting out by the scan chain during normal operations is made impossible.