Abstract: A high frequency switch device has SPDT(A), SPDT(B), and SPDT(C) switches, each having one pole and a first port and a second port, wherein the second port of the SPDT(A) is grounded via a terminating resistor and the second port of the SPDT(B) is grounded via a terminating resistor, respectively, and the first port of the SPDT(A) and the first port of the SPDT(B) are respectively connected to the first port and the second port of the SPDT(C).

Abstract: A high frequency switch device has SPDT(A), SPDT(B), and SPDT(C) switches, each having one pole and a first port and a second port, wherein the second port of the SPDT(A) is grounded via a terminating resistor and the second port of the SPDT(B) is grounded via a terminating resistor, respectively, and the first port of the SPDT(A) and the first port of the SPDT(B) are respectively connected to the first port and the second port of the SPDT(C).

Abstract: A microwave semiconductor integrated circuit having high isolation includes a wiring-side substrate including a transmission line in slots at a surface; an element-side substrate having an active element on a surface, the transmission line being embedded in the wiring-side substrate; and metal bumps electrically connecting the transmission line embedded in the wiring-side substrate to electrodes of the active element on the element-side substrate. Therefore, a connection between a transmission line and electrodes of an element, such as an FET or the like, can be easily realized without being affected by a difference in positional level between the transmission line and the electrodes. In addition, the element on the element-side substrate is not adversely affected by the subsequent fabrication of the slots and wiring layers and, therefore, the reliability of the integrated circuit is not adversely affected.

Abstract: A method of designing the layout of milliwave and microwave integrated circuits using a computer aided design system includes displaying each of a plurality of kinds of lumped circuit elements and distributed constant transmission lines for an integrated circuit on a cathode ray tube display as respective closed drawing objects, each object having an area and dimension representing electrical data; connecting the drawing objects displayed on the cathode ray tube display by overlapping edges of them with each other to produce a virtual integrated circuit having the circuit construction of the integrated circuit; and performing logical operations on the overlapping drawing objects of the virtual integrated circuit according to a design rule defined in accordance with a production process for producing the integrated circuit to produce at least one mask pattern for manufacturing the integrated circuit.

Abstract: A power amplifier comprises opposite input and output terminals, a first amplifier circuit connected between the input terminal and the output terminal and comprising a first amplifier FET and a first matching circuit, and a second amplifier circuit connected between the input terminal and the output terminal and comprising a second amplifier FET, a second matching circuit, and a switching circuit. In this power amplifier, the first amplifier circuit outputs an output signal of a first power level when the first amplifier FET is operated while the second amplifier FET is not operated and the switching circuit is turned off, and the second amplifier circuit outputs an output signal of a second power level when the first amplifier FET is not operated while the second amplifier FET is operated and the switching circuit is turned on.

Abstract: A microwave integrated circuit includes a semiconductor substrate having semiconductor elements, such as transistors, diodes, resistors, and the like, and a passive circuit substrate having passive circuit elements, such as microstrip or coplanar transmission lines, spiral inductors, capacitances, and the like, on its front surface. The passive circuit substrate is mounted on the semiconductor substrate so that the rear surface of the passive circuit substrate faces the surface of the semiconductor substrate on which the semiconductor elements are present, and the semiconductor elements are electrically connected to the elements or grounding conductors of the passive circuit substrate via through-holes or bumps. The passive circuit substrate includes a thin dielectric film having less dielectric loss than the semiconductor substrate, and the passive circuit elements, especially the transmission lines, are disposed on the dielectric substrate.

Abstract: A microwave integrated circuit comprises a first field effect transistor (FET) whose source is grounded via a capacitor and is connected to a source bias constant current source and to the drains of second field effect transistors whose gates are connected to a voltage power supply, an input matching circuit which is connected between the gate of the first FET and an input terminal, and an output matching circuit which is connected between the drain of the first FET and an output terminal. A drain current of the first FET having an almost constant value flows independent of variations in the direct current transistor characteristics and a rapid switching response is obtained when the first FET is driven on or off by a pulse.

Abstract: A digital transmission circuit for processing and outputting a digital output signal includes a mark density detecting circuit for detecting the amplitude of the DC signal component of the digital signal and a DC level shifter superposing a DC signal component on the digital signal in response to the detected amplitude. Thereby, the output signal level, regardless of the mark density of the input signal, does not drift.

Abstract: A semiconductor integrated circuit includes a field effect transistor on a dielectric substrate, a rear surface electrode on a rear surface of the dielectric substrate, a gate bias bonding pad for applying a bias to a gate of the field effect transistor, a current path between the pad and the gate impedance matched with the gate, and a via-hole connecting the source or the drain of the field effect transistor with the rear surface electrode. The current path and the rear surface electrode are electrically connected with each other by an auxiliary current path through a high resistance material that does not change the impedance at the gate. Thus, static electricity charging the gate bias bonding pad or a capacitor in the gate bias circuit during the fabrication process flows not through the gate of the FET but through the auxiliary current path, whereby the gate is protected from electrostatic breakdown.

Abstract: A semiconductor integrated circuit includes a first FET for controlling transfer of a high frequency signal, first and second capacitors connected to a gate of the first FET directly or through a resistor or a 1/4 wavelength line, a second FET having its drain connected to the first capacitor and its source grounded at high frequencies band, and a third FET having its drain connected to said second capacitor and its source grounded at high frequencies.

Abstract: A multivibrator circuit employing field effect transistors which operates with a high oscillation frequency and low power consumption comprises four series connections. The first series connection comprises a parallel connection including a resistor R.sub.1 and a diode D.sub.1 connected in parallel, and two field effect transistors Q.sub.1 and Q.sub.3, the first series connection being provided between the power supply V.sub.DD1 and the ground V.sub.SS. The second series connection comprises a field effect transistor Q.sub.5, diodes D.sub.3 for shifting a level and a field effect transistor Q.sub.7, the second series connection being provided between the power supply V.sub.DD2 and the ground V.sub.SS. The third series connection comprises R.sub.2, a diode D.sub.2 and two field effect transistors Q.sub.2 and Q.sub.4 in the same manner as in the first series connection. The fourth series connection comprises a field effect device Q.sub.6, diodes D.sub.4 for shifting a level and a field effect device Q.sub.

Abstract: An integrated circuit includes a semi-insulating semiconductor substrate; a first conductivity type high dopant concentration buried layer produced in the semi-insulating substrate; second conductivity type high dopant concentration drain and source regions produced at the surface of the semi-insulating substrate; a gate electrode produced on the surface of the semi-insulating substrate at a position between the drain and source regions; a second conductivity type channel layer produced between the drain and source regions; and a first conductivity type low dopant concentration region produced only below the second conductivity type channel layer between the second conductivity type drain and source regions in the first conductivity type high dopant concentration region; the drain and source regions being completely surrounded by the first conductivity type high dopant concentration buried layer from the bottom and outer side surfaces thereof.