Patents by Inventor Noriyuki Tatsumi
Noriyuki Tatsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8410581Abstract: There is provided a silicon device structure, comprising: a P-doped n+ type amorphous silicon film formed on a silicon semiconductor, and a wiring formed on the P doped n+ type amorphous silicon film, wherein the wiring is formed of a silicon oxide film which is formed on a surface of the P doped n+ type amorphous silicon film and is also formed of a copper alloy film, and the copper alloy film is a film obtained by forming a copper alloy containing Mn of 1 atom % or more and 5 atom % or less and P of 0.05 atom % or more and 1.0 atom % or less by sputtering.Type: GrantFiled: July 6, 2011Date of Patent: April 2, 2013Assignee: Hitachi Cable LtdInventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Patent number: 8368184Abstract: There is provided a silicon device structure, comprising: a P-doped n+ type amorphous silicon film formed on a silicon semiconductor, and a wiring formed on the P doped n+ type amorphous silicon film, wherein the wiring is formed of a silicon oxide film which is formed on a surface of the P doped n+ type amorphous silicon film and is also formed of a copper alloy film, and the copper alloy film is a film obtained by forming a copper alloy containing Mn of 1 atom % or more and 5 atom % or less and P of 0.05 atom % or more and 1.0 atom % or less by sputtering.Type: GrantFiled: July 6, 2011Date of Patent: February 5, 2013Assignee: Hitachi Cable LtdInventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Publication number: 20120248611Abstract: An interconnecting structure production method includes providing a substrate, forming a semiconductor layer on the substrate, forming a doped semiconductor layer on the semiconductor layer, the doped semiconductor layer containing a dopant, forming an oxide layer in a surface of the doped semiconductor layer by heating the surface of the doped semiconductor layer in atmosphere of an oxidizing gas with a water molecule contained therein, forming an alloy layer on the oxide layer, and forming an interconnecting layer on the alloy layer.Type: ApplicationFiled: June 11, 2012Publication date: October 4, 2012Applicant: HITACHI CABLE, LTD.Inventor: Noriyuki TATSUMI
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Patent number: 8227347Abstract: An interconnecting structure production method includes providing a substrate, forming a semiconductor layer on the substrate, forming a doped semiconductor layer on the semiconductor layer, the doped semiconductor layer containing a dopant, forming an oxide layer in a surface of the doped semiconductor layer by heating the surface of the doped semiconductor layer in atmosphere of an oxidizing gas with a water molecule contained therein, forming an alloy layer on the oxide layer, and forming an interconnecting layer on the alloy layer.Type: GrantFiled: April 16, 2010Date of Patent: July 24, 2012Assignee: Hitachi Cable, Ltd.Inventor: Noriyuki Tatsumi
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Patent number: 8173905Abstract: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a nickel, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a nickel in the diffusion barrier layer is enriched compared with the backing layer.Type: GrantFiled: February 2, 2009Date of Patent: May 8, 2012Assignee: Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Publication number: 20120007077Abstract: There is provided a silicon device structure, comprising: a P-doped n+ type amorphous silicon film formed on a silicon semiconductor, and a wiring formed on the P doped n+ type amorphous silicon film, wherein the wiring is formed of a silicon oxide film which is formed on a surface of the P doped n+ type amorphous silicon film and is also formed of a copper alloy film, and the copper alloy film is a film obtained by forming a copper alloy containing Mn of 1 atom % or more and 5 atom % or less and P of 0.05 atom % or more and 1.0 atom % or less by sputtering.Type: ApplicationFiled: July 6, 2011Publication date: January 12, 2012Applicant: HITACHI CABLE, LTD.Inventors: Noriyuki TATSUMI, Tatsuya TONOGI
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Publication number: 20110284372Abstract: According to one embodiment of the invention, a Cu—Ga alloy material has an average composition consisting of not less than 32% and not more than 53% by mass of gallium (Ga) as well as the balance consisting of copper (Cu) and an inevitable impurity. In the Cu—Ga alloy material, a region containing less than 47% by mass of copper accounts for 2% or less by volume of the whole Cu—Ga alloy material.Type: ApplicationFiled: May 5, 2011Publication date: November 24, 2011Applicant: HITACHI CABLE, LTD.Inventors: Yuichi HIRAMOTO, Tatsuya TONOGI, Noriyuki TATSUMI
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Publication number: 20110139615Abstract: A sputtering target material includes a copper alloy made of an oxygen free copper with a purity of 99.99% or more doped with Ag of 200 to 2000 ppm. The sputtering target material is formed by casting and rolling. An average grain size of crystal is 30 to 100 ?m. A ratio (220)/(111) which is a ratio of an orientation ratio of (220) plane to an orientation ratio of (111) plane calculated based on a peak intensity measurement of an X-ray diffraction at a sputtering surface is 6 or less and a standard deviation indicating a dispersion in the ratio (220)/(111) is 10 or less.Type: ApplicationFiled: October 6, 2010Publication date: June 16, 2011Inventors: Noriyuki TATSUMI, Kouichi Isaka, Katsutoshi Honya, Masami Odakura, Tatsuya Tonogi
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Patent number: 7884010Abstract: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a manganese, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a manganese in the diffusion barrier layer is enriched compared with the backing layer.Type: GrantFiled: February 2, 2009Date of Patent: February 8, 2011Assignee: Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Publication number: 20100264415Abstract: An interconnecting structure production method includes providing a substrate, forming a semiconductor layer on the substrate, forming a doped semiconductor layer on the semiconductor layer, the doped semiconductor layer containing a dopant, forming an oxide layer in a surface of the doped semiconductor layer by heating the surface of the doped semiconductor layer in atmosphere of an oxidizing gas with a water molecule contained therein, forming an alloy layer on the oxide layer, and forming an interconnecting layer on the alloy layer.Type: ApplicationFiled: April 16, 2010Publication date: October 21, 2010Applicant: HITACHI CABLE, LTD.Inventor: Noriyuki TATSUMI
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Publication number: 20100096172Abstract: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a nickel, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a nickel in the diffusion barrier layer is enriched compared with the backing layer.Type: ApplicationFiled: February 2, 2009Publication date: April 22, 2010Applicant: Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Publication number: 20100096755Abstract: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a manganese, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a manganese in the diffusion barrier layer is enriched compared with the backing layer.Type: ApplicationFiled: February 2, 2009Publication date: April 22, 2010Applicant: Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Tatsuya Tonogi
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Publication number: 20100000857Abstract: A copper sputtering target material includes a sputter surface formed of a copper material including one crystal orientation plane and other crystal orientation planes. By application of accelerated specified inert gas ions, the one crystal orientation plane emits sputter particles with energy greater than energy of sputter particles sputtered out of the other crystal orientation planes. The occupying proportion of the one crystal orientation plane to the sum of the one crystal orientation plane and the other crystal orientation planes is not less than 15%.Type: ApplicationFiled: June 30, 2009Publication date: January 7, 2010Inventors: Tatsuya TONOGI, Noriyuki Tatsumi, Kouichi Isaka, Katsutoshi Honya, Masami Odakura
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Patent number: 6255596Abstract: A tube made of oxygen free copper is filled with a plurality of copper matrix Nb—Ti superconducting lead wires to obtain a composite billet. The resulting billet is subjected to hydrostatic pressure extrusion. Further, ageing heat treatment and wire drawing process are repeated for the composite material three times to prepare a Cu/Nb—Ti superconducting single wire. Then, the resulting Cu/Nb—Ti superconducting single wires are stranded each other to produce a superconducting strand. The superconducting strand is coated with an aluminum alloy to which either a content of 20 to 100 ppm of Cu and Mg or Mg, or a content of 10 to 120 ppm of Si and Cu is added by means of hot extrusion, the strand thus extruded is reduced by 0 to 20% in accordance with cold working to produce an aluminum stabilized superconductor.Type: GrantFiled: April 23, 1998Date of Patent: July 3, 2001Assignees: Hitachi Cable Ltd., Sumitomo Chemical Company, LimitedInventors: Fumikazu Hosono, Noriyuki Tatsumi, Kenichi Kikuchi, Genzo Iwaki, Hidezumi Moriai, Hitoshi Yasuda, Akihiko Takahashi
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Patent number: 5998050Abstract: A composite material is disclosed which includes a substrate, an oriented film provided on a surface of the substrate and formed of a crystal of a Y123 metal oxide of the formula LnBa.sub.2 Cu.sub.3 O.sub.y wherein Ln stands for Y or an element belonging to the lanthanoid and y is a number of 6-7, and a layer of a Y123 metal oxide of the formula LnBa.sub.2 Cu.sub.3 O.sub.y wherein Ln stands for Y or an element belonging to the lanthanoid and y is a number of 6-7 formed on the oriented film.Type: GrantFiled: December 19, 1996Date of Patent: December 7, 1999Assignees: International Superconductivity Technology Center, Hitachi Cable Ltd., Hokkaido Electric Power Co., Inc., Kyushu Electric Power Co., Inc., The Kansai Electric Power Co., Inc.,, Fujikura, Ltd.Inventors: Yasuji Yamada, Masaru Nakamura, Noriyuki Tatsumi, Jiro Tsujino, Kanshi Ohtsu, Yasuo Kanamori, Minoru Tagami, Atsushi Kume, Yuh Shiohara, Shoji Tanaka
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Patent number: 5731271Abstract: A method for growing a superconductive film, comprising:(a) helically winding a tape substrate around the outer periphery of a cylindrical or columnar holder and(b) growing a superconductive film on the surface of the tape substrate by plasma flash evaporation, while rotating the holder. According to the present invention, the heat contact between the holder and the tape substrate is stabilized and a high performance tape conductor can be obtained. In addition, degradation of superconductive performance possibly experienced, when the tape is used for a transmission cable or the like, can be lessened. Furthermore, the large area growth, which is the characteristic feature of plasma flash evaporation, is effectively utilized and production efficiency of a long tape conductor can be enhanced.Type: GrantFiled: September 25, 1996Date of Patent: March 24, 1998Assignees: Mitsubishi Cable Industries, Ltd., Hokkaido Electric Power Company, Inc., International Superconductivity Technology CenterInventors: Shigenori Yuhya, Jiro Tsujino, Noriyuki Tatsumi, Yoh Shiohara
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Patent number: 5627142Abstract: A composite material is disclosed which includes a substrate, an oriented film provided on a surface of the substrate and formed of a crystal of a Y123 metal oxide of the formula LnBa.sub.2 Cu.sub.3 O.sub.y wherein Ln stands for Y or an element belonging to the lanthanoid and y is a number of 6-7, and a layer of a Y123 metal oxide of the formula LnBa.sub.2 Cu.sub.3 O.sub.y wherein Ln stands for Y or an element belonging to the lanthanoid and y is a number of 6-7 formed on the oriented film.Type: GrantFiled: July 25, 1994Date of Patent: May 6, 1997Assignees: International Superconductivity Technology Center, Hitachi Cable, Ltd., Hokkaido Electric Power Co., Inc., Kyushu Electric Power Co., Inc., Kansai Electric Power Co., Inc., Fujikura, Ltd.Inventors: Yasuji Yamada, Masaru Nakamura, Noriyuki Tatsumi, Jiro Tsujino, Kanshi Ohtsu, Yasuo Kanamori, Minoru Tagami, Atsushi Kume, Yuh Shiohara, Shoji Tanaka
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Patent number: 5453306Abstract: The generation of a reaction product is suppressed between a metallic substrate and plasma in depositing a ceramic intermediate layer on the metallic substrate in a process for depositing an oxide film on the metallic substrate by thermal plasma flash evaporation method. Thus, there is no reaction phase in the ceramic intermediate layer and the metallic substrate, and an intermediated buffer layer of only oxide ceramic is deposited on a flat surface of the metallic substrate. The intermediate ceramic layer is deposited in inert atmosphere of a low oxygen concentration at a temperature of less than 600.degree. C. for the metallic substrate. Then, a superconducting thin film is deposited on the ceramic intermediate layer.Type: GrantFiled: June 30, 1994Date of Patent: September 26, 1995Assignees: International Superconductivity Technology Center, Hokkaido Electric Power Co., Inc., Fujikura Ltd., Tokyo Gas Co., Ltd., Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Jiro Tsujino, Atsushi Kume, Yuh Shiohara, Shoji Tanaka, Shigenori Yuhya, Kei Kikuchi