Patents by Inventor Noriyuki Tomita
Noriyuki Tomita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190282181Abstract: According to an embodiment, an information display system includes a displacement measurement unit, a display unit, and a controller. The displacement measurement unit measures displacement of a measurement part. The display unit displays a time axis of signal detection. The controller controls the displacement measurement unit and the display unit. When a signal that is output from the displacement measurement unit meets a given condition, the controller determines that displacement of the measurement part is detected and displays detection information representing that the displacement is detected in any one of a time position and a time area on the display unit in which the displacement is detected.Type: ApplicationFiled: March 11, 2019Publication date: September 19, 2019Applicant: Ricoh Company, Ltd.Inventors: Hideaki YAMAGATA, Noriyuki Tomita, Aritaka Hagiwara, Shinya Mukasa, Yutaka Yagiura, Daisuke Sakai
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Publication number: 20190282176Abstract: An information display device includes a component extraction unit, a sorting unit, and a noise component selection unit. The component extraction unit is configured to perform a principal component analysis or an independent component analysis to extract desired components from a plurality of signal waveforms based on detected biological signals. The sorting unit is configured to sort a plurality of extracted results obtained by the component extraction unit in descending order of periodicity and display the sorted results. The noise component selection unit is configured to receive selection of one extracted result as a noise component from the extracted results obtained by the component extraction unit.Type: ApplicationFiled: February 25, 2019Publication date: September 19, 2019Applicant: Ricoh Company, Ltd.Inventors: Hideaki Yamagata, Noriyuki TOMITA
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Publication number: 20190282174Abstract: A biological signal analysis device includes: an acquiring unit configured to acquire biological signals of a measurement target; a trigger information acquiring unit configured to acquire, from a stimulator configured to apply stimuli to the measurement target, trigger information indicating times at which the stimuli are generated; and a signal processing unit configured to process the biological signals. The signal processing unit is configured to calculate biological information on the measurement target based on the biological signals, maintain only pieces of trigger information corresponding to times at which it is determined that biological signals of the measurement target are generated, from the calculated biological information, delete another piece of trigger information, and use an averaged waveform that is obtained by performing an averaging process on the biological signals that are generated in synchronization with the stimuli based on the pieces of remaining trigger information.Type: ApplicationFiled: March 5, 2019Publication date: September 19, 2019Applicant: Ricoh Company, ltd.Inventors: Hideaki YAMAGATA, Eiichi Okumura, Noriyuki Tomita
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Publication number: 20190274640Abstract: An information processing apparatus includes an acquiring unit, a determining unit, and a changing unit. The acquiring unit is configured to acquire determination information for determining a display layout of a screen for displaying information related to one or more biological signals. The determining unit is configured to determine a display layout corresponding to the determination information acquired by the acquiring unit. The changing unit is configured to change a display layout of the screen in accordance with the display layout determined by the determining unit.Type: ApplicationFiled: March 1, 2019Publication date: September 12, 2019Applicant: Ricoh Company, Ltd.Inventors: Shinya Mukasa, Hideaki Yamagata, Noriyuki Tomita, Aritaka Hagiwara, Yutaka Yagiura, Daisuke Sakai
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Patent number: 10215494Abstract: The present invention relates to a method of operating an electric arc furnace containing (a) a furnace shell having a tapping hole and/or a slag door, (b) a furnace roof having a plurality of electrodes provided so as to face downwards, and (c) a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a rotating step of rotating the furnace shell relative to the electrodes during melting of a metal material, and a holding step of stopping the rotation when any one of the plurality of electrodes reaches a holding position that is previously set close to the tapping hole or the slag door, and holding the furnace shell at the holding position.Type: GrantFiled: November 3, 2015Date of Patent: February 26, 2019Assignee: DAIDO STEEL CO., LTD.Inventors: Noriyuki Tomita, Yoshikazu Tanaka, Akihiro Nagatani, Masato Ogawa, Kunio Matsuo
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Publication number: 20190021676Abstract: An information processing apparatus includes a display control unit. The display control unit is configured to execute control to display a plurality of partial waveform data in parallel in a time axis direction of the plurality of partial waveform data, the plurality of partial waveform data each representing temporal change of one or more biological signals and each respectively representing biological waveform data corresponding to a respective partial time period, spots from among the biological waveform data being specifiable, the display control unit being further configured to execute control to display the spots of the plurality of partial waveform data, with emphasis, upon being specified.Type: ApplicationFiled: August 27, 2018Publication date: January 24, 2019Applicant: Ricoh Company, Ltd.Inventors: Michinari SHINOHARA, Yutaka YAGIURA, Noriyuki TOMITA, Daisuke SAKAI
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Patent number: 10001324Abstract: A method of operating an electric arc furnace containing a furnace shell having a tapping hole, a plurality of electrodes, and a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a charging step of opening an opening-and-closing door of a scrap bucket containing a metal material and falling the metal material into the furnace shell in which the furnace shell is rotated by the rotating apparatus until a direction of a line connecting a center of the furnace shell to a center of the tapping hole intersects an extension direction of a seam at a closing side of the opening-and-closing door, the opening-and-closing door is opened in this positional relationship to charge the metal material.Type: GrantFiled: November 3, 2015Date of Patent: June 19, 2018Assignee: DAIDO STEEL CO., LTD.Inventors: Noriyuki Tomita, Yoshikazu Tanaka
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Publication number: 20160123665Abstract: The present invention relates to a method of operating an electric arc furnace containing a furnace shell having a tapping hole, a plurality of electrodes, and a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a charging step of opening an opening-and-closing door of a scrap bucket containing a metal material and falling the metal material into the furnace shell in which the furnace shell is rotated by the rotating apparatus until a direction of a line connecting a center of the furnace shell to a center of the tapping hole intersects an extension direction of a seam at a closing side of the opening-and-closing door, the opening-and-closing door is opened in this positional relationship to charge the metal material.Type: ApplicationFiled: November 3, 2015Publication date: May 5, 2016Applicant: DAIDO STEEL CO., LTD.Inventors: Noriyuki TOMITA, Yoshikazu TANAKA
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Publication number: 20160123664Abstract: The present invention relates to a method of operating an electric arc furnace containing (a) a furnace shell having a tapping hole and/or a slag door, (b) a furnace roof having a plurality of electrodes provided so as to face downwards, and (c) a rotating apparatus that rotates the furnace shell around a vertical axis relative to the electrodes, the method contains a rotating step of rotating the furnace shell relative to the electrodes during melting of a metal material, and a holding step of stopping the rotation when any one of the plurality of electrodes reaches a holding position that is previously set close to the tapping hole or the slag door, and holding the furnace shell at the holding position.Type: ApplicationFiled: November 3, 2015Publication date: May 5, 2016Applicant: DAIDO STEEL CO., LTD.Inventors: Noriyuki TOMITA, Yoshikazu TANAKA, Akihiro NAGATANI, Masato OGAWA, Kunio MATSUO
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Patent number: 9182173Abstract: Provided is an arc furnace, including: a furnace body having a bottomed cylindrical shape; a furnace lid that openably closes an opening of the furnace body; an electrode that is provided at the furnace lid and melts a metal material supplied into the furnace body by electric discharge; a tilting floor that is tiltable within a plane substantially perpendicular to the tilting floor; and a rotation mechanism that is provided on the tilting floor inward from an outer circumference of the furnace body to support a bottom wall of the furnace body, and rotates the furnace body around a cylinder axis thereof.Type: GrantFiled: August 25, 2014Date of Patent: November 10, 2015Assignee: DAIDO STEEL CO., LTD.Inventors: Masato Ogawa, Kunio Matsuo, Noriyuki Tomita, Akihiro Nagatani
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Publication number: 20150063400Abstract: Provided is an arc furnace, including: a furnace body having a bottomed cylindrical shape; a furnace lid that openably closes an opening of the furnace body; an electrode that is provided at the furnace lid and melts a metal material supplied into the furnace body by electric discharge; a tilting floor that is tiltable within a plane substantially perpendicular to the tilting floor; and a rotation mechanism that is provided on the tilting floor inward from an outer circumference of the furnace body to support a bottom wall of the furnace body, and rotates the furnace body around a cylinder axis thereof.Type: ApplicationFiled: August 25, 2014Publication date: March 5, 2015Applicant: Daido Steel Co., Ltd.Inventors: Masato OGAWA, Kunio MATSUO, Noriyuki TOMITA, Akihiro NAGATANI
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Patent number: 7936488Abstract: An image reading apparatus includes: a light source emitting a plurality of colors; a light receiver including a plurality of pixels which receive lights of respective colors; an analog-to-digital converter which analog-to-digital converts analog signals obtained by the light receiver to obtain digital photoelectric conversion outputs, respectively; a color determining portion which receives output signals, determines whether output signals for respective colors from the same pixel are within predetermined ranges, respectively, and outputs, as dropout data, pixel position information of the pixel, the outputs signals from which are within the predetermined ranges, respectively; an image monochromating circuit which receives output signals and obtains monochrome data; a data substituting portion which receives the monochrome data, substitutes the monochrome data corresponding to the pixel position information from the color determining portion with a level at which the pixel is determined as a white level in aType: GrantFiled: August 12, 2008Date of Patent: May 3, 2011Assignee: Mitsubishi Electric CorporationInventors: Hironobu Arimoto, Noriyuki Tomita, Satoshi Yamanaka
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Patent number: 7885989Abstract: An encoding circuit is disclosed which comprises: a data-for-encoding storing register that stores n-bit data for encoding; a data-for-calculation storing register that stores m-bit data for calculation generated by shifting the data for encoding; a shifter that shifts the data for encoding stored in the data-for-encoding storing register, and shifts and inputs the shifted data into the data-for-calculation storing register; a first coefficient register that stores m-bit first coefficient data indicating a first coefficient for executing encoding; a first logic circuit that is inputted with the data for calculation stored in the data-for-calculation storing register and the first coefficient data stored in the first coefficient register and outputs the logical product for each bit of the data for calculation and the first coefficient data; and a second logic circuit that is inputted with m-bit data outputted from the first logic circuit and outputs the exclusive logical sum of the m-bit data as the encoded daType: GrantFiled: December 21, 2006Date of Patent: February 8, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Iwao Honda, Hideki Ohashi, Takashi Kuroda, Noriyuki Tomita
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Publication number: 20090207462Abstract: An image reading apparatus includes: a light source emitting a plurality of colors; a light receiver including a plurality of pixels which receive lights of respective colors; an analog-to-digital converter which analog-to-digital converts analog signals obtained by the light receiver to obtain digital photoelectric conversion outputs, respectively; a color determining portion which receives output signals, determines whether output signals for respective colors from the same pixel are within predetermined ranges, respectively, and outputs, as dropout data, pixel position information of the pixel, the outputs signals from which are within the predetermined ranges, respectively; an image monochromating circuit which receives output signals and obtains monochrome data; a data substituting portion which receives the monochrome data, substitutes the monochrome data corresponding to the pixel position information from the color determining portion with a level at which the pixel is determined as a white level in aType: ApplicationFiled: August 12, 2008Publication date: August 20, 2009Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Hironobu ARIMOTO, Noriyuki Tomita, Satoshi Yamanaka
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Patent number: 7508554Abstract: An image reader includes a transparent plate (1) having end portions (1a and 1b) that are chamfered in a direction in which a document is carried thereon. The transparent plate (1) has recess portions (11a and 11b) formed in a lower surface thereof, and a housing (4) is engaged into the recess portions of the transparent plate. The image reader can prevent such a document as a check or banknote from being jammed, can be easily assembled and improve the reliability of the carrying of the document, and enables higher-speed reading.Type: GrantFiled: March 29, 2002Date of Patent: March 24, 2009Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Noriyuki Tomita, Hiroshi Itoh
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Patent number: 7440338Abstract: A memory control circuit that controls m (=L/k) memories (first to mth memories), each of which has a k-bit width, the m memories storing data having a data width (D bits) of an integral multiple of k bits up to L bits, the circuit comprising: an address input circuit that determines a memory (nth memory) storing a first k bits of the data among the m memories, based on a start-position specification address which is a predetermined j bits of an A-bit address indicating a storage destination of the data, and inputs to the nth to mth memories a first specification address for specifying a storage destination of the data, the first specification address being an A-j bits of the A-bit address, which is the A-bit address without the predetermined j bits thereof, and inputs to the first to (n?1)th memories a second specification address obtained by adding one to the first specification address; a data input circuit that inputs a plurality of pieces of divided data obtained by dividing the data into k-bit data to tType: GrantFiled: December 21, 2006Date of Patent: October 21, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Takashi Kuroda, Iwao Honda, Noriyuki Tomita, Hideki Ohashi
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Publication number: 20070147137Abstract: A memory control circuit that controls m (=L/k) memories (first to mth memories), each of which has a k-bit width, the m memories storing data having a data width (D bits) of an integral multiple of k bits up to L bits, the circuit comprising: an address input circuit that determines a memory (nth memory) storing a first k bits of the data among the m memories, based on a start-position specification address which is a predetermined j bits of an A-bit address indicating a storage destination of the data, and inputs to the nth to mth memories a first specification address for specifying a storage destination of the data, the first specification address being an A-j bits of the A-bit address, which is the A-bit address without the predetermined j bits thereof, and inputs to the first to (n?1)th memories a second specification address obtained by adding one to the first specification address; a data input circuit that inputs a plurality of pieces of divided data obtained by dividing the data into k-bit data to tType: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Takashi Kuroda, Iwao Honda, Noriyuki Tomita, Hideki Ohashi
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Publication number: 20070146194Abstract: An encoding circuit is disclosed which comprises: a data-for-encoding storing register that stores n-bit data for encoding; a data-for-calculation storing register that stores m-bit data for calculation generated by shifting the data for encoding; a shifter that shifts the data for encoding stored in the data-for-encoding storing register, and shifts and inputs the shifted data into the data-for-calculation storing register; a first coefficient register that stores m-bit first coefficient data indicating a first coefficient for executing encoding; a first logic circuit that is inputted with the data for calculation stored in the data-for-calculation storing register and the first coefficient data stored in the first coefficient register and outputs the logical product for each bit of the data for calculation and the first coefficient data; and a second logic circuit that is inputted with m-bit data outputted from the first logic circuit and outputs the exclusive logical sum of the m-bit data as the encoded daType: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Iwao Honda, Hideki Ohashi, Takashi Kuroda, Noriyuki Tomita
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Publication number: 20070150641Abstract: A bus address selecting circuit is disclosed that selects addresses to be output to a first address bus connected to a first memory and a second address bus connected to a second memory, the bus address selecting circuit comprising an address output circuit that, based on a selecting bit composed of a predetermined plurality of bits in an instruction code, outputs addresses stored in first and second address registers out of a plurality of address registers as first and second addresses; and a bus selecting circuit that, based on predetermined higher-order n bits of at least one of the first and second addresses, outputs the first address to one of the first and second address buses and the second address to the other of the first and second address buses.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Iwao Honda, Hideki Ohashi, Takashi Kuroda, Noriyuki Tomita
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Publication number: 20040165226Abstract: An image reader includes a transparent plate (1) having end portions (1a and 1b) that are chamfered in a direction in which a document is carried thereon. The transparent plate (1) has recess portions (11aand 11b) formed in a lower surface thereof, and a housing (4) is engaged into the recess portions of the transparent plate. The image reader can prevent such a document as a check or banknote from being jammed, can be easily assembled and improve the reliability of the carrying of the document, and enables higher-speed reading.Type: ApplicationFiled: November 28, 2003Publication date: August 26, 2004Inventors: Noriyuki Tomita, Hiroshi Itoh