Patents by Inventor Norman F. Prokop

Norman F. Prokop has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11128293
    Abstract: Methods and devices are disclosed for compensating for device property variations across a wafer. The method comprises determining an output of a first device based on an input and determining an output of a second device based on the input. The second device is located at a different position with respect to a center of the wafer than a position of the first device with respect to the center of the wafer. The method further comprises determining a difference between the output of the first device and the output of the second device, the difference arising at least in part from the difference in position of the first and second devices. The method further comprises altering the first device such that the output of the first device based on the input substantially matches the output of the second device based on the input.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: September 21, 2021
    Assignee: United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop, Philip G. Neudeck, David J. Spry
  • Patent number: 10396709
    Abstract: Some embodiments of the present invention describe an apparatus that includes an oscillator, a ramp generator, and an inverter. The apparatus includes an oscillator, an inverter, and a ramp generator. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time of the waveform, a measurement of a current and a voltage of the solar cell is performed as the current and voltage of the solar cell are transmitted through a first channel and to a second channel.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: August 27, 2019
    Assignee: United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Patent number: 10122363
    Abstract: A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 6, 2018
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administraion
    Inventors: Michael J. Krasowski, Norman F. Prokop, Philip G. Neudeck
  • Patent number: 10069536
    Abstract: An apparatus and method are provided for communicating over power lines. The apparatus includes a coupling modem that is situated between a power line and a device. The coupling modem is configured to demodulate a signal received from the power line into a sine signal and a cosine signal. The coupling modem is also configured to modulate a communicated bit stream received from the device into a transmitted signal in order to impose the transmitted signal onto the power line.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: September 4, 2018
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop, Lawrence C. Greer, III, Jennifer M. Nappier
  • Patent number: 10049326
    Abstract: An apparatus, method, and computer program that can learn a linear or non-linear transfer function are disclosed. In one embodiment, for example, a computer-implemented method may include creating a plurality of combinations for at least one input, and calculating an output for the plurality of combinations. The method may also include calculating an error based on the calculated output.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: August 14, 2018
    Assignee: The United States of America as Represented by the Admin of National Aeronautics and Space Administration
    Inventors: Michael J Krasowski, Norman F Prokop
  • Publication number: 20180183386
    Abstract: Some embodiments of the present invention describe an apparatus that includes an oscillator, a ramp generator, and an inverter. The apparatus includes an oscillator, an inverter, and a ramp generator. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time of the waveform, a measurement of a current and a voltage of the solar cell is performed as the current and voltage of the solar cell are transmitted through a first channel and to a second channel.
    Type: Application
    Filed: May 18, 2016
    Publication date: June 28, 2018
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Publication number: 20170338769
    Abstract: Some embodiments of the present invention describe an apparatus that includes an oscillator, a ramp generator, and an inverter. The apparatus includes an oscillator, an inverter, and a ramp generator. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time of the waveform, a measurement of a current and a voltage of the solar cell is performed as the current and voltage of the solar cell are transmitted through a first channel and to a second channel.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Patent number: 9755645
    Abstract: A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: September 5, 2017
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Patent number: 9660680
    Abstract: An apparatus and method are provided for communicating over power lines. The apparatus includes a coupling modem that is situated between a power line and a device. The coupling modem is configured to demodulate a signal received from the power line into a sine signal and a cosine signal. The coupling modem is also configured to modulate a communicated bit stream received from the device into a transmitted signal in order to impose the transmitted signal onto the power line.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: May 23, 2017
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop, Lawrence C. Greer, III, Jennifer M. Nappier
  • Patent number: 9424654
    Abstract: Analog circuits for detecting edges in pixel arrays are disclosed. A comparator may be configured to receive an all pass signal and a low pass signal for a pixel intensity in an array of pixels. A latch may be configured to receive a counter signal and a latching signal from the comparator. The comparator may be configured to send the latching signal to the latch when the all pass signal is below the low pass signal minus an offset. The latch may be configured to hold a last negative edge location when the latching signal is received from the comparator.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: August 23, 2016
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventor: Norman F Prokop
  • Patent number: 9419558
    Abstract: Embodiments of the present invention describe an apparatus including an oscillator, a ramp generator, and an inverter. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator is configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time, a measurement of a current and a voltage of the solar cell is performed. During the high time, a measurement of a current of a shorted cell and a voltage reference is performed.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: August 16, 2016
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Patent number: 9160896
    Abstract: Analog circuits for detecting edges in pixel arrays are disclosed. A comparator may be configured to receive an all pass signal and a low pass signal for a pixel intensity in an array of pixels. A latch may be configured to receive a counter signal and a latching signal from the comparator. The comparator may be configured to send the latching signal to the latch when the all pass signal is below the low pass signal minus an offset. The latch may be configured to hold a last negative edge location when the latching signal is received from the comparator.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: October 13, 2015
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventor: Norman F Prokop
  • Patent number: 9142961
    Abstract: An apparatus and method are provided for communicating over power lines. The apparatus includes a coupling modem that is situated between a power line and a device. The coupling modem is configured to demodulate a signal received from the power line into a sine signal and a cosine signal. The coupling modem is also configured to modulate a communicated bit stream received from the device into a transmitted signal in order to impose the transmitted signal onto the power line.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 22, 2015
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop, Lawrence C. Greer, III, Jennifer M. Nappier
  • Patent number: 8704654
    Abstract: A high temperature communications circuit includes a power conductor for concurrently conducting electrical energy for powering circuit components and transmitting a modulated data signal, and a demodulator for demodulating the data signal and generating a serial bit stream based on the data signal. The demodulator includes an absolute value amplifier for conditionally inverting or conditionally passing a signal applied to the absolute value amplifier. The absolute value amplifier utilizes no diodes to control the conditional inversion or passing of the signal applied to the absolute value amplifier.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: April 22, 2014
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Publication number: 20120256648
    Abstract: Embodiments of the present invention describe an apparatus including an oscillator, a ramp generator, and an inverter. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator is configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time, a measurement of a current and a voltage of the solar cell is performed. During the high time, a measurement of a current of a shorted cell and a voltage reference is performed.
    Type: Application
    Filed: April 17, 2012
    Publication date: October 11, 2012
    Inventors: Michael J. Krasowski, Norman F. Prokop
  • Patent number: 8159238
    Abstract: Some embodiments of the present invention describe an apparatus that includes an oscillator, a ramp generator, and an inverter. The apparatus includes an oscillator, an inverter, and a ramp generator. The oscillator is configured to generate a waveform comprising a low time and a high time. The inverter is configured to receive the waveform generated by the oscillator, and invert the waveform. The ramp generator configured to increase a gate control voltage of a transistor connected to a solar cell, and rapidly decrease the gate control voltage of the transistor. During the low time of the waveform, a measurement of a current and a voltage of the solar cell is performed as the current and voltage of the solar cell are transmitted through a first channel and to a second channel.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: April 17, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Michael J. Krasowski, Norman F. Prokop