Abstract: Structures and methods for reducing physical space of two or three inductors while maintaining low magnetic coupling between the inductors are presented. According to one aspect, the inductors share their volume spaces and have (substantially) orthogonal far field magnetic vectors. According to another aspect, the inductors are fabricated on planar layers of a stacked structure that includes conductive and non-conductive layers. According to an additional aspect, a coil structure of one of the inductors passes through a volume space of another inductor. According to another aspect, coil structures of two of the inductors are interlaced. According to another aspect, relative placement of two coil structures of two inductors is based on a number of windings of one of the two coil structures above and below the other coil structure. According to another aspect, a shape of a coil structure of one inductor follows a near field magnetic vector of another inductor.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: Structures and methods for reducing physical space of two or three inductors while maintaining low magnetic coupling between the inductors are presented. According to one aspect, the inductors share their volume spaces and have (substantially) orthogonal far field magnetic vectors. According to another aspect, the inductors are fabricated on planar layers of a stacked structure that includes conductive and non-conductive layers. According to an additional aspect, a coil structure of one of the inductors passes through a volume space of another inductor. According to another aspect, coil structures of two of the inductors are interlaced. According to another aspect, relative placement of two coil structures of two inductors is based on a number of windings of one of the two coil structures above and below the other coil structure. According to another aspect, a shape of a coil structure of one inductor follows a near field magnetic vector of another inductor.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: A bi-directional coupler architecture that allows an entire radio frequency coupler to be fully integrated with other circuitry on a single IC substrate. Embodiments of the invention use a lumped component architecture instead of quarter-wave transmission lines to reduce area and limit loss on the primary signal line. In some embodiments, two directional couplers of opposite polarities are implemented at least in part using spiral secondary inductors electromagnetically coupled to a shared primary inductor signal line, thus providing a bi-directional coupler architecture.

Abstract: A multi-mode multi-band power amplifier (PA) module is described. In an exemplary design, the PA module includes multiple power amplifiers, multiple matching circuits, and a set of switches. Each power amplifier provides power amplification for its input signal when selected. Each matching circuit provides impedance matching and filtering for its power amplifier and provides a respective output signal. The switches configure the power amplifiers to support multiple modes, with each mode being for a particular radio technology. Each power amplifier supports at least two modes. The PA module may further include a driver amplifier and an additional matching circuit. The driver amplifier amplifies an input signal and provides an amplified signal to the power amplifiers. The additional matching circuit combines the outputs of other matching circuits and provides an output signal with higher output power. The driver amplifier and the power amplifiers can support multiple output power levels.

Abstract: A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier.

Abstract: Techniques for reducing undesired source degeneration inductance are disclosed. In an exemplary design, an apparatus includes first and second connections. The first connection includes a first parasitic inductance acting as a source degeneration inductance of an amplifier. The second connection includes a second parasitic inductance magnetically coupled to the first parasitic inductance to reduce the source degeneration inductance of the amplifier. The amplifier (e.g., a single-ended power amplifier) may be coupled to circuit ground via the first connection. An impedance matching circuit may be coupled to the amplifier and may include a circuit component coupled to circuit ground via the second connection. The first connection may be located sufficiently close to (e.g., within a predetermined distance of) the second connection in order to obtain the desired magnetic coupling between the first and second parasitic inductances.

Abstract: An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.

Abstract: Techniques for reducing undesired source degeneration inductance are disclosed. In an exemplary design, an apparatus includes first and second connections. The first connection includes a first parasitic inductance acting as a source degeneration inductance of an amplifier. The second connection includes a second parasitic inductance magnetically coupled to the first parasitic inductance to reduce the source degeneration inductance of the amplifier. The amplifier (e.g., a single-ended power amplifier) may be coupled to circuit ground via the first connection. An impedance matching circuit may be coupled to the amplifier and may include a circuit component coupled to circuit ground via the second connection. The first connection may be located sufficiently close to (e.g., within a predetermined distance of) the second connection in order to obtain the desired magnetic coupling between the first and second parasitic inductances.

Abstract: An output circuit with integrated impedance matching, power combining, and filtering and suitable for use with power amplifiers and other circuits is described. In an exemplary design, an apparatus may include first and second circuits (e.g., power amplifiers) and an output circuit. The first circuit may provide a first single-ended signal and may have a first output impedance. The second circuit may provide a second single-ended signal and may have a second output impedance. The output circuit may include (i) first and second matching circuits that perform output impedance matching and filtering for the first and second circuits, (ii) a combiner (e.g., a summing node) that combines the first and second single-ended signals to obtain a combined single-ended signal, (iii) a third matching circuit that performs impedance matching and filtering for the combined single-ended signal, and (iv) switches to route the single-ended signals to different outputs.

Abstract: An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.

Abstract: A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier.