Patents by Inventor Norman Marenco

Norman Marenco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9328010
    Abstract: The invention is a method for structuring a flat substrate composed of glass material in the course of a viscous flow process. The glass flat substrate is joined to a surface of a flat substrate, which is preferably a semiconductor flat substrate, having at least one depression bounded by a circumferential edge located in the surface. In the course of a subsequent tempering process, glass material is changed to a viscous free-flowing state in which at least proportions of the free-flowing glass material of the flat substrate flow over the circumferential edge into the depression in the flat substrate.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: May 3, 2016
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Norman Marenco, Hans-Joachim Quenzer
  • Patent number: 8900904
    Abstract: A wafer stack that is diced to produce a multitude of micro-optoelectronic devices includes a first wafer including a semiconductor material; a second wafer including an optically transparent material; a multitude of light sensor arrangements in the semiconductor material of the first wafer for each of the micro-optical devices; the second wafer structured to form a multitude of micro-optical elements therein for each of the micro-optoelectronic devices; and a wafer stack produced wafer bonding, the wafer stack including the first wafer and the second wafer arranged above same, each of the micro-optical elements arranged and structured such that different portions of light incident on the micro-optical element are directed onto different light sensor elements of a light sensor arrangement at least partly arranged below the micro-optical element.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: December 2, 2014
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Norman Marenco
  • Publication number: 20140301697
    Abstract: The invention is a method for structuring a flat substrate composed of glass material in the course of a viscous flow process. The glass flat substrate is joined to a surface of a flat substrate, which is preferably a semiconductor flat substrate, having at least one depression bounded by a circumferential edge located in the surface. In the course of a subsequent tempering process, glass material is changed to a viscous free-flowing state in which at least proportions of the free-flowing glass material of the flat substrate flow over the circumferential edge into the depression in the flat substrate.
    Type: Application
    Filed: August 2, 2012
    Publication date: October 9, 2014
    Inventors: Norman Marenco, Hans-Joachim Quenzer
  • Patent number: 8330247
    Abstract: The invention relates to a semiconductor arrangement and method for production thereof, wherein the semiconductor arrangement is provided with an integrated circuit arranged on a substrate. The integrated circuit is structured on the front face of the substrate and at least one capacitor is connected to the integrated circuit, wherein the at least one capacitor is designed as a monolithic deep structure in trenches. The trenches are arranged in at least one first group and at least one second group, the trenches of a group running essentially parallel to each other and the first and second group are at an angle to each other, essentially at right angles to each other.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: December 11, 2012
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventor: Norman Marenco
  • Publication number: 20120091551
    Abstract: A wafer stack that is diced to produce a multitude of micro-optoelectronic devices includes a first wafer including a semiconductor material; a second wafer including an optically transparent material; a multitude of light sensor arrangements in the semiconductor material of the first wafer for each of the micro-optical devices; the second wafer structured to form a multitude of micro-optical elements therein for each of the micro-optoelectronic devices; and a wafer stack produced wafer bonding, the wafer stack including the first wafer and the second wafer arranged above same, each of the micro-optical elements arranged and structured such that different portions of light incident on the micro-optical element are directed onto different light sensor elements of a light sensor arrangement at least partly arranged below the micro-optical element.
    Type: Application
    Filed: September 13, 2011
    Publication date: April 19, 2012
    Inventor: Norman Marenco
  • Publication number: 20100181645
    Abstract: The invention relates to a semiconductor arrangement and method for production thereof, wherein the semiconductor arrangement is provided with an integrated circuit arranged on a substrate. The integrated circuit is structured on the front face of the substrate and at least one capacitor is connected to the integrated circuit, wherein the at least one capacitor is designed as a monolithic deep structure in trenches. The trenches are arranged in at least one first group and at least one second group, the trenches of a group running essentially parallel to each other and the first and second group are at an angle to each other, essentially at right angles to each other.
    Type: Application
    Filed: February 20, 2008
    Publication date: July 22, 2010
    Applicant: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V.
    Inventor: Norman Marenco
  • Publication number: 20100142167
    Abstract: An electronic, in particular microelectronic, functional group and to a method for its production are described. The method can include the following steps: a) coating of a mount with a non-conductive adhesive; b) application of a conductor structure to a subarea of the adhesive layer; c) arrangement of an electronic component with at least one external electrical connecting contact on the adhesive layer and on the conductor structure, with the at least one connecting contact of the electronic component being brought directly into contact with the conductor structure, and with a part of the outer casing of the component being brought directly into contact with the adhesive layer. The method can allow electronic, in particular microelectronic, functional groups to be produced with care, quickly and in particular at low cost.
    Type: Application
    Filed: November 24, 2006
    Publication date: June 10, 2010
    Applicant: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V.
    Inventor: Norman Marenco
  • Patent number: 7596436
    Abstract: The operating voltage is monitored in a microcontroller having associated output stages which are used to control components. In the case of over-voltage, the output stage is disconnected. Two technology-related, voltage monitoring devices working in different operating voltage ranges are provided. Due to the combination thereof, a highly precise disconnection threshold and a greater area for the operating voltage, which is to be monitored, can be obtained. If a malfunction of an over-voltage occurs, the output stages can be disconnected in a reliable manner.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: September 29, 2009
    Assignee: Siemens Aktiengesellschaft
    Inventors: Johann Falter, Alfons Fisch, Ralf Förster, Marco Kick, Thomas Maier, Norman Marenco, Peter Skotzek
  • Patent number: 7444226
    Abstract: When a microcontroller, having associated output stages which are used to control components, is used, a digital release signal, in addition to the control signal, is supplied to an output stage which signals the blocking or releasing of the output stage according to the state of the signal. In the event of malfunction in the region of the microcontroller, the output stage can be disconnected. Modulation of the release signal and evaluation of the release signal which is guided to the output stage enables a malfunction in the region of the production of the release signal and/or the transmission of the release signal to be recognized using the absence of the modulation. In the event of malfunction, the output stage can disconnected in a reliable manner.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: October 28, 2008
    Assignee: Siemens Aktiengesellschaft
    Inventor: Norman Marenco
  • Publication number: 20080033626
    Abstract: When a microcontroller, having associated output stages which are used to control components, is used, a digital release signal, in addition to the control signal, is supplied to an output stage which signals the blocking or releasing of the output stage according to the state of the signal. In the event of malfunction in the region of the microcontroller, the output stage can be disconnected. Modulation of the release signal and evaluation of the release signal which is guided to the output stage enables a malfunction in the region of the production of the release signal and/or the transmission of the release signal to be recognized using the absence of the modulation. In the event of malfunction, the output stage can disconnected in a reliable manner.
    Type: Application
    Filed: March 21, 2005
    Publication date: February 7, 2008
    Inventor: Norman Marenco
  • Publication number: 20080004765
    Abstract: The operating voltage is monitored in a microcontroller having associated output stages which are used to control components. In the case of over-voltage, the output stage is disconnected. Two technology-related, voltage monitoring devices working in different operating voltage ranges are provided. Due to the combination thereof, a highly precise disconnection threshold and a greater area for the operating voltage, which is to be monitored, can be obtained. If a malfunction of an over-voltage occurs, the output stages can be disconnected in a reliable manner.
    Type: Application
    Filed: April 8, 2005
    Publication date: January 3, 2008
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Johann Falter, Alfons Fisch, Ralf Forster, Marco Kick, Thomas Maier, Norman Marenco, Peter Skotzek