Abstract: A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it.

Abstract: A bus bridge is disclosed that handles bus transactions that must be completed on a destination bus before being completed on an originating bus by indicating a retry to delay such bus transactions on the originating bus while completing such bus transactions on the destination bus.

Abstract: A bus with bus commands which optimize the management of buffers within a bus bridge is disclosed. The bus incorporates at least two types of write commands, a Postable Memory Write command and a Memory Write command. The Postable Memory Write command serves as a write command which additionally instructs the bus bridge that the processor will not be informed that the data transfer is complete, and thus, data may be posted in the bus bridge. In contrast, the Memory Write command serves as a write command which additionally instructs the bus bridge that the processor may be informed that the data transfer is complete, and that data should not, accordingly, be posted. These two write commands are used in combination such that a data transfer of a contiguous block of data utilizes Postable Memory Write commands until the final transaction in the transfer, at which time, a Memory Write command is used.

Abstract: A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it.

Abstract: A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it.