Patents by Inventor Nozomi Horikoshi
Nozomi Horikoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9508619Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.Type: GrantFiled: June 7, 2013Date of Patent: November 29, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoyuki Aoki, Takuya Tsurume, Hiroki Adachi, Nozomi Horikoshi, Hisashi Ohtani
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Patent number: 9412060Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: GrantFiled: September 29, 2014Date of Patent: August 9, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato, Takaaki Koen, Yuto Yakubo, Makoto Yanagisawa, Hisashi Ohtani, Eiji Sugiyama, Nozomi Horikoshi
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Publication number: 20150014419Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: ApplicationFiled: September 29, 2014Publication date: January 15, 2015Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Kiyoshi KATO, Takaaki KOEN, Yuto YAKUBO, Makoto YANAGISAWA, Hisashi OHTANI, Eiji SUGIYAMA, Nozomi HORIKOSHI
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Patent number: 8872331Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: GrantFiled: April 12, 2011Date of Patent: October 28, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato, Takaaki Koen, Yuto Yakubo, Makoto Yanagisawa, Hisashi Ohtani, Eiji Sugiyama, Nozomi Horikoshi
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Publication number: 20130270720Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.Type: ApplicationFiled: June 7, 2013Publication date: October 17, 2013Inventors: Tomoyuki AOKI, Takuya TSURUME, Hiroki ADACHI, Nozomi HORIKOSHI, Hisashi OHTANI
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Patent number: 8459561Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.Type: GrantFiled: September 4, 2008Date of Patent: June 11, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoyuki Aoki, Takuya Tsurume, Hiroki Adachi, Nozomi Horikoshi, Hisashi Ohtani
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Patent number: 8101990Abstract: A semiconductor device is provided, which includes a first insulating layer over a first substrate, a transistor over the first insulating layer, a second insulating layer over the transistor, a first conductive layer connected to a source region or a drain region of the transistor through an opening provided in the second insulating layer, a third insulating layer over the first conductive layer, and a second substrate over the third insulating layer. The transistor comprises a semiconductor layer, a second conductive layer, and a fourth insulating layer provided between the semiconductor layer and the second conductive layer. One or plural layers selected from the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer have a step portion which is provided so as not to overlap with the transistor.Type: GrantFiled: May 25, 2006Date of Patent: January 24, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuya Tsurume, Nozomi Horikoshi
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Publication number: 20110186949Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: ApplicationFiled: April 12, 2011Publication date: August 4, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Kiyoshi KATO, Takaaki KOEN, Yuto YAKUBO, Makoto YANAGISAWA, Hisashi OHTANI, Eiji SUGIYAMA, Nozomi HORIKOSHI
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Patent number: 7932589Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: GrantFiled: July 21, 2008Date of Patent: April 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato, Takaaki Koen, Yuto Yakubo, Makoto Yanagisawa, Hisashi Ohtani, Eiji Sugiyama, Nozomi Horikoshi
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Patent number: 7534702Abstract: An efficient mass-production method of very small devices that can receive or transmit data in touch, preferably, out of touch is provided by forming an integrated circuit made of a thin film over a large glass substrate and transferring the integrated circuit to another backing to be divided. Especially, the integrated circuit made of a thin film is difficult to use since there is a threat that the integrated circuit is scattered in the handling of the integrated circuit since the integrated circuit is extremely thin. According to the present invention, multiple openings reaching a peel layer are provided, a material body having a pattern shape that does not cover regions (the openings and a device portion) is provided, and then, a gas or liquid containing fluorine halide is introduced to partially remove the peel layer.Type: GrantFiled: June 21, 2005Date of Patent: May 19, 2009Inventors: Tatsuya Arao, Yoshitaka Dozen, Daiki Yamada, Eiji Sugiyama, Tomoko Tamura, Junya Maruyama, Nozomi Horikoshi, Yuugo Goto
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Publication number: 20090090940Abstract: A semiconductor device is provided, which includes a first insulating layer over a first substrate, a transistor over the first insulating layer, a second insulating layer over the transistor, a first conductive layer connected to a source region or a drain region of the transistor through an opening provided in the second insulating layer, a third insulating layer over the first conductive layer, and a second substrate over the third insulating layer. The transistor comprises a semiconductor layer, a second conductive layer, and a fourth insulating layer provided between the semiconductor layer and the second conductive layer. One or plural layers selected from the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer have a step portion which is provided so as not to overlap with the transistor.Type: ApplicationFiled: May 25, 2006Publication date: April 9, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takuya Tsurume, Nozomi Horikoshi
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Publication number: 20090085182Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 ?/cm2 is formed on at least one surface of each structure body.Type: ApplicationFiled: July 21, 2008Publication date: April 2, 2009Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato, Takaaki Koen, Yuto Yakubo, Makoto Yanagisawa, Hisashi Ohtani, Eiji Sugiyama, Nozomi Horikoshi
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Publication number: 20090065590Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.Type: ApplicationFiled: September 4, 2008Publication date: March 12, 2009Inventors: Tomoyuki AOKI, Takuya TSURUME, Hiroki ADACHI, Nozomi HORIKOSHI, Hisashi OHTANI
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Patent number: 7307006Abstract: It is an object of the present invention to provide a technology to manufacture a semiconductor sheet or a semiconductor chip with a high yield using a circuit having a thin film transistor. A manufacturing method for a semiconductor device comprises: attaching a flexible base material to an element layer x times (x is an integer number of 4 or more), wherein a thickness of a base material which is attached to the element layer (y+1)th (y is an integer number of 1 or more and less than x) time is the same or smaller than that of a base material which is attached to the element layer y-th (y is an integer number of 1 or more and less than x) time.Type: GrantFiled: February 16, 2006Date of Patent: December 11, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Susumu Okazaki, Nozomi Horikoshi
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Publication number: 20060194371Abstract: It is an object of the present invention to provide a technology to manufacture a semiconductor sheet or a semiconductor chip with a high yield using a circuit having a thin film transistor. A manufacturing method for a semiconductor device comprises: attaching a flexible base material to an element layer x times (x is an integer number of 4 or more), wherein a thickness of a base material which is attached to the element layer (y+1)th (y is an integer number of 1 or more and less than x) time is the same or smaller than that of a base material which is attached to the element layer y-th (y is an integer number of 1 or more and less than x) time.Type: ApplicationFiled: February 16, 2006Publication date: August 31, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Susumu Okazaki, Nozomi Horikoshi
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Publication number: 20050285231Abstract: An efficient mass-production method of very small devices that can receive or transmit data in touch, preferably, out of touch is provided by forming an integrated circuit made of a thin film over a large glass substrate and transferring the integrated circuit to another backing to be divided. Especially, the integrated circuit made of a thin film is difficult to use since there is a threat that the integrated circuit is flied in all directions as the integrated circuit is extremely thin. According to the present invention, multiple holes or grooves reaching the peel layer are provided, and a material body having a pattern shape that does not cover the holes (or grooves) and the device portion is provided, then, gas or liquid containing fluorine halide is introduced to remove selectively the peel layer.Type: ApplicationFiled: June 21, 2005Publication date: December 29, 2005Inventors: Tatsuya Arao, Yoshitaka Dozen, Daiki Yamada, Eiji Sugiyama, Tomoko Tamura, Junya Maruyama, Nozomi Horikoshi, Yuugo Goto