Patents by Inventor Nrupal Jani

Nrupal Jani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929927
    Abstract: A network interface controller can be programmed to direct write received data to a memory buffer via either a host-to-device fabric or an accelerator fabric. For packets received that are to be written to a memory buffer associated with an accelerator device, the network interface controller can determine an address translation of a destination memory address of the received packet and determine whether to use a secondary head. If a translated address is available and a secondary head is to be used, a direct memory access (DMA) engine is used to copy a portion of the received packet via the accelerator fabric to a destination memory buffer associated with the address translation. Accordingly, copying a portion of the received packet through the host-to-device fabric and to a destination memory can be avoided and utilization of the host-to-device fabric can be reduced for accelerator bound traffic.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: March 12, 2024
    Assignee: Intel Corporation
    Inventors: Pratik M. Marolia, Rajesh M. Sankaran, Ashok Raj, Nrupal Jani, Parthasarathy Sarangam, Robert O. Sharp
  • Publication number: 20230056330
    Abstract: Methods and apparatus for two-layer Alpha-based buffer management with dynamic RED. A two-layer hierarchical sharing scheme using alpha parameters is provided. A buffer is dynamically shared across upper-level entities, such as hosts, using one set of alpha parameters, then a dynamically-adjusted buffer portion allocated for an upper level entity is shared among its lower level entities (e.g., sub queues) using a separate set of low-level alpha parameters. The memory spaces for the upper- and lower-level entities may be dynamically redistributed. Determinations to drop and/or mark and ECN field of received packets are performed using Dynamic RED, which employs dynamic thresholds and associated dynamic probabilities.
    Type: Application
    Filed: October 18, 2022
    Publication date: February 23, 2023
    Applicant: Intel Corporation
    Inventors: Sarig LIVNE, Nrupal JANI, Eli SHAPIRO, Parthasarathy SARANGAM, Neerav PARIKH
  • Patent number: 11573870
    Abstract: Examples may include a computing platform having a host driver to get a packet descriptor of a received packet stored in a receive queue and to modify the packet descriptor from a first format to a second format. The computing platform also includes a guest virtual machine including a guest driver coupled to the host driver, the guest driver to receive the modified packet descriptor and to read a packet buffer stored in the receive queue using the modified packet descriptor, the packet buffer corresponding to the packet descriptor.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 7, 2023
    Assignee: Intel Corporation
    Inventors: Manasi Deval, Nrupal Jani, Anjali Singhai Jain, Parthasarathy Sarangam, Mitu Aggarwal, Neerav Parikh, Kiran Patil, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Patent number: 11556436
    Abstract: Examples may include a method of protecting memory and I/O transactions. The method includes allocating memory for an application, assigning a resource of a physical device to the application, assigning a process address space identifier to the assigned resource, creating a security enclave to protect the allocated memory of the application, and associating the security enclave with the process address space identifier to protect the allocated memory and the assigned resource.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Manasi Deval, Nrupal Jani, Parthasarathy Sarangam, Mitu Aggarwal, Kiran Patil, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Patent number: 11556437
    Abstract: Examples include a method of live migrating a virtual device by creating a virtual device in a virtual machine, creating first and second interfaces for the virtual device, transferring data over the first interface, detecting a disconnection of the virtual device from the virtual machine, switching data transfers for the virtual device from the first interface to the second interface, detecting a reconnection of the virtual device to the virtual machine, and switching data transfers for the virtual device from the second interface to the first interface.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Mitu Aggarwal, Nrupal Jani, Manasi Deval, Kiran Patil, Parthasarathy Sarangam, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Patent number: 11531752
    Abstract: Technologies for control plane separation at a network interface controller (NIC) of a compute device configured to transmit, by a resource of the compute device, commands to a physical function managed by a network interface controller (NIC) of the compute device. The NIC is further to establish a data plane separate from a control plane, wherein the control plane comprises one of the trusted control path and the untrusted control path. Additionally, the resource is configured to transmit the commands via one of the trusted control path or the untrusted control path based on a trust level associated with the physical function. Other embodiments are described herein.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: December 20, 2022
    Assignee: Intel Corporation
    Inventors: Akeem Abodunrin, Lev Faerman, Scott Dubal, Suyog Kulkarni, Anjali Singhai Jain, Eliel Louzoun, Nrupal Jani, Yadong Li, Eliezer Tamir, Arvind Srinivasan, Ben-Zion Friedman
  • Patent number: 11513924
    Abstract: Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: November 29, 2022
    Assignee: Intel Corporation
    Inventors: Nrupal Jani, Manasi Deval, Anjali Singhai Jain, Parthasarathy Sarangam, Mitu Aggarwal, Neerav Parikh, Alexander H. Duyck, Kiran Patil, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Publication number: 20220350714
    Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 3, 2022
    Inventors: Nrupal JANI, Manasi DEVAL, Anjali Singhai JAIN, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Alexander H. DUYCK, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Patent number: 11474916
    Abstract: Examples include a method of performing failover of in an I/O architecture by allocating a first set of resources, associated with a first port of a physical device, to a virtual device, allocating a second set of resources, associated with a second port of the physical device, to the virtual device, assigning the virtual device to a virtual machine, activating the first set of resources, and transferring data between the virtual machine and the first port using the virtual device and the first set of resources. The method further includes detecting an error in the first set of resources, deactivating the first set of resources and activating the second set of resources, and transferring data between the virtual machine and the second port using the virtual device and the second set of resources.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: October 18, 2022
    Assignee: Intel Corporation
    Inventors: Mitu Aggarwal, Nrupal Jani, Manasi Deval, Kiran Patil, Parthasarathy Sarangam, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Patent number: 11025544
    Abstract: A network interface controller can be programmed to direct write received data to a memory buffer via either a host-to-device fabric or an accelerator fabric. For packets received that are to be written to a memory buffer associated with an accelerator device, the network interface controller can determine an address translation of a destination memory address of the received packet and determine whether to use a secondary head. If a translated address is available and a secondary head is to be used, a direct memory access (DMA) engine is used to copy a portion of the received packet via the accelerator fabric to a destination memory buffer associated with the address translation. Accordingly, copying a portion of the received packet through the host-to-device fabric and to a destination memory can be avoided and utilization of the host-to-device fabric can be reduced for accelerator bound traffic.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: June 1, 2021
    Assignee: Intel Corporation
    Inventors: Pratik M. Marolia, Rajesh M. Sankaran, Ashok Raj, Nrupal Jani, Parthasarathy Sarangam, Robert O. Sharp
  • Publication number: 20210112003
    Abstract: A network interface controller can be programmed to direct write received data to a memory buffer via either a host-to-device fabric or an accelerator fabric. For packets received that are to be written to a memory buffer associated with an accelerator device, the network interface controller can determine an address translation of a destination memory address of the received packet and determine whether to use a secondary head. If a translated address is available and a secondary head is to be used, a direct memory access (DMA) engine is used to copy a portion of the received packet via the accelerator fabric to a destination memory buffer associated with the address translation. Accordingly, copying a portion of the received packet through the host-to-device fabric and to a destination memory can be avoided and utilization of the host-to-device fabric can be reduced for accelerator bound traffic.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Inventors: Pratik M. MAROLIA, Rajesh M. SANKARAN, Ashok RAJ, Nrupal JANI, Parthasarathy SARANGAM, Robert O. SHARP
  • Publication number: 20200183729
    Abstract: Methods and apparatus for evolving hypervisor pass-through devices supporting platform independence through a core solution called MUSE (Mdev in User SpacE) that allows mediated pass-through device being served by software running in user space. The MUSE architecture supports platform hardware independence while providing pass-through performance similar to hardware-specific solutions and providing enhanced performance in virtualized environments using existing software components, including various operating systems and associated libraries for implementing SDN (Software Defined Networking) and VNF (Virtualized Network Function).
    Type: Application
    Filed: January 9, 2020
    Publication date: June 11, 2020
    Inventors: Xiuchun Lu, Cunming Liang, Shaopeng He, Nrupal Jani, Anjali Jain, Edwin Verplanke, Parthasarathy Sarangam, Zhirun Yan
  • Publication number: 20200099628
    Abstract: The present disclosure is directed to systems and methods for rate limiting network traffic generated by virtual machines (VMs) having multiple attached SR-IOV virtual functions. The network interface circuitry includes a plurality of offload circuits, each performing operations associated with a specific VF. Each VM attached to network interface circuitry is assigned a unique identifier. The unique identifier associated with a VM is inserted into the header of data packets originated by the VM. The packets are queued using a dedicated memory queue assigned to the VM. The aggregate data transfer rate for the VM is determined based upon counting the data packets originated by the VM and processed across the plurality of offload circuits. If the aggregate data transfer rate exceeds a data transfer rate threshold, traffic control circuitry limits the transfer of data packets from the memory queue associated with the VM to the plurality of offload circuits.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Applicant: Intel Corporation
    Inventors: Neerav Parikh, Nrupal Jani
  • Publication number: 20190297015
    Abstract: A network interface controller can be programmed to direct write received data to a memory buffer via either a host-to-device fabric or an accelerator fabric. For packets received that are to be written to a memory buffer associated with an accelerator device, the network interface controller can determine an address translation of a destination memory address of the received packet and determine whether to use a secondary head. If a translated address is available and a secondary head is to be used, a direct memory access (DMA) engine is used to copy a portion of the received packet via the accelerator fabric to a destination memory buffer associated with the address translation. Accordingly, copying a portion of the received packet through the host-to-device fabric and to a destination memory can be avoided and utilization of the host-to-device fabric can be reduced for accelerator bound traffic.
    Type: Application
    Filed: June 7, 2019
    Publication date: September 26, 2019
    Inventors: Pratik M. MAROLIA, Rajesh M. SANKARAN, Ashok RAJ, Nrupal JANI, Parthasarathy SARANGAM, Robert O. SHARP
  • Publication number: 20190114194
    Abstract: Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Nrupal JANI, Manasi DEVAL, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Alexander H. DUYCK, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114195
    Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Nrupal JANI, Manasi DEVAL, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Alexander H. DUYCK, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114283
    Abstract: Examples may include a computing platform having a host driver to get a packet descriptor of a received packet stored in a receive queue and to modify the packet descriptor from a first format to a second format. The computing platform also includes a guest virtual machine including a guest driver coupled to the host driver, the guest driver to receive the modified packet descriptor and to read a packet buffer stored in the receive queue using the modified packet descriptor, the packet buffer corresponding to the packet descriptor.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Applicants: Intel Corporation, Intel Corporation
    Inventors: Manasi DEVAL, Nrupal JANI, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114196
    Abstract: Examples include a method of live migrating a virtual device by creating a virtual device in a virtual machine, creating first and second interfaces for the virtual device, transferring data over the first interface, detecting a disconnection of the virtual device from the virtual machine, switching data transfers for the virtual device from the first interface to the second interface, detecting a reconnection of the virtual device to the virtual machine, and switching data transfers for the virtual device from the second interface to the first interface.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Mitu AGGARWAL, Nrupal JANI, Manasi DEVAL, Kiran PATIL, Parthasarathy SARANGAM, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190108106
    Abstract: Examples include a method of performing failover of in an I/O architecture by allocating a first set of resources, associated with a first port of a physical device, to a virtual device, allocating a second set of resources, associated with a second port of the physical device, to the virtual device, assigning the virtual device to a virtual machine, activating the first set of resources, and transferring data between the virtual machine and the first port using the virtual device and the first set of resources. The method further includes detecting an error in the first set of resources, deactivating the first set of resources and activating the second set of resources, and transferring data between the virtual machine and the second port using the virtual device and the second set of resources.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Inventors: Mitu AGGARWAL, Nrupal JANI, Manasi DEVAL, Kiran PATIL, Parthasarathy SARANGAM, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190107965
    Abstract: Examples may include a method of protecting memory and I/O transactions. The method includes allocating memory for an application, assigning a resource of a physical device to the application, assigning a process address space identifier to the assigned resource, creating a security enclave to protect the allocated memory of the application, and associating the security enclave with the process address space identifier to protect the allocated memory and the assigned resource.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Inventors: Manasi DEVAL, Nrupal JANI, Parthasarathy SARANGAM, Mitu AGGARWAL, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN