Patents by Inventor Nuntha Kumar Krishnasamy Maniam

Nuntha Kumar Krishnasamy Maniam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9431965
    Abstract: A radio-frequency amplifier includes a matching network comprising a switching unit. The switching unit is operable in a first condition to provide a selected impedance at a first selected frequency. The switching unit is operable in a second condition to form a bandstop filter. A stop band of the bandstop filter includes a second selected frequency. The first selected frequency may be a second harmonic of a transmission frequency different from the second selected frequency. A multi-band transceiver is also described, as is a method of transmitting a first signal and a second signal.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: August 30, 2016
    Assignee: Marvell International Ltd.
    Inventors: Ming He, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 9401798
    Abstract: An apparatus includes an antenna, a first transceiver circuit, a second transceiver circuit, a first filter coupled between the antenna and the first transceiver circuit and configured to pass a first signal and attenuate a second signal, and a second filter coupled between the antenna and the second transceiver circuit and configured to pass the second signal and attenuate the first signal. The first signal has a first frequency and the second signal has a second frequency. The first transceiver circuit, the second transceiver circuit, and the first filter are integrated in a system on chip (SOC).
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: July 26, 2016
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: David M. Signoff, Alden Chee Ho Wong, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 9246451
    Abstract: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: January 26, 2016
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 9007130
    Abstract: A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: April 14, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 8878612
    Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: November 4, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Poh Boon Leong, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20140203874
    Abstract: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: Marvell World Trade LTD.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20140125417
    Abstract: A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 8680924
    Abstract: A differential power amplifier is provided and includes a first pair of transistors. A first transistor is inductively coupled to a voltage source and is connected to a node at a ground reference potential. A second transistor is inductively coupled to the node and is connected to the voltage source. Gates of the transistors are configured to receive an AC signal with a fundamental frequency. Drain of the first and second transistors are respectively first and second output nodes. The output nodes provide a first differential output. A capacitor is connected between the output nodes and provides a pathway for cancellation of even harmonic signals of the fundamental frequency. A second pair of transistors provides a second differential output. A first inductor is connected between the output nodes. A second inductor is connected between output nodes of the second pair of transistors. A combiner is inductively coupled to the inductors.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: March 25, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 8629727
    Abstract: A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: January 14, 2014
    Assignee: Marvell Internatonal Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20130300506
    Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Applicant: Marvell World Trade Ltd.
    Inventors: Poh Boon Leong, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20120161871
    Abstract: A power amplifier includes a push-pull pair of transistors including a first transistor inductively coupled to a voltage source and coupled to a ground, and a second transistor inductively coupled to the ground and coupled to the voltage source. Gates of the first and the second transistors are AC inputs configured to receive an AC signal having a fundamental frequency. Drain regions of the first and the second transistors are, respectively, first and second output nodes. The power amplifier further includes a capacitor coupled between the first output node and the second output node and where the capacitor is configured as a pathway for cancellation of even harmonic signals of the fundamental frequency of the AC signal.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 28, 2012
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20120161880
    Abstract: A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 28, 2012
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20120161876
    Abstract: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 28, 2012
    Inventors: Poh Boon Leong, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 7019593
    Abstract: Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: March 28, 2006
    Assignee: Agency For Science, Technology And Research
    Inventors: Nuntha Kumar Krishnasamy Maniam, Yong Zhong Xiong
  • Publication number: 20050140456
    Abstract: Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
    Type: Application
    Filed: December 26, 2003
    Publication date: June 30, 2005
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: Nuntha Kumar Krishnasamy Maniam, Yong Zhong Xiong
  • Patent number: 6819179
    Abstract: The load of the cascode amplifier is varied by connecting another (secondary) load in parallel with the original load. The secondary load is connected through a MOSFET switch. During the High Gain Mode the MOSFET switch is OFF and the secondary load is electrically isolated from the main load, whereas in the Low Gain Mode the switch is turned ON and the secondary load appears across the primary load, reducing the effective load impedance. The secondary load is AC coupled such that the DC bias current does not pass through the secondary load and hence the Noise Figure (NF) and linearity (IIP3) performance are better in the Low Gain Mode. A number of such switchable loads can be connected across the load to obtain programmability.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: November 16, 2004
    Assignee: Agency for Science, Technology and Research
    Inventors: Muthusamy Kumarasamy Raja, Nuntha Kumar Krishnasamy Maniam
  • Patent number: 6775323
    Abstract: A data coding system for coding data represented by a number of symbols is described. The system includes representing each symbol with a unique digital waveform. All the unique digital waveforms have a duty cycle greater than 50% or a duty cycle less than 50%.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: August 10, 2004
    Assignee: National University of Singapore
    Inventors: Kumar Vasudevan Pillai, Nuntha Kumar Krishnasamy Maniam