Abstract: Methods and systems for wafer lot ordering using including estimation of allowable queue time based on utilization loss and rework percentage have been achieved. The method invented comprises steps of ranking lots, allocating equipment to the exit step of queue time, calculating and determining the optimal allowable queue time based on utilization loss and rework percentage, calculating the next available time for equipment, calculating earliest release time, and releasing lot/batch and pre-assign it to the equipment at exit step. The present invention can be applied to other manufacturing lines than semiconductor manufacturing.

Abstract: Methods and systems for reticle scheduling in semiconductor manufacturing providing a trade-off between complying with level priority and maximizing scanner utilization for critical scanners as a whole is disclosed. The extent of trade-off is specified by user, depending on scanner excess capacity. The method invented comprises, first, the steps of an initialization block performing splitting planning horizon into time buckets, initialization of system variables, and reading data on work-in-process, scanner/reticle status and reticle locations. The following block determines which buckets to run optimization for. The next method block is building a network for optimization based on inputs from inline real-time dispatching (RTD) followed by running optimization of the network. The last method block updates WIP and reticle information based on optimization results and feeds the results into a wafer lot assignment system.

Abstract: Methods and systems for wafer lot ordering using including estimation of allowable queue time based on utilization loss and rework percentage have been achieved. The method invented comprises steps of ranking lots, allocating equipment to the exit step of queue time, calculating and determining the optimal allowable queue time based on utilization loss and rework percentage, calculating the next available time for equipment, calculating earliest release time, and releasing lot/batch and pre-assign it to the equipment at exit step. The present invention can be applied to other manufacturing lines than semiconductor manufacturing.