Abstract: Systems and methods to deliver live sound with enhanced quality conveyed by a mixing desk to a mobile computing device user contemporaneously with external live sounds. The mobile computing device is operable to receive enhanced audio signals produced by a remote audio signal processing device through a communication work. A memory resident application is configured to playback the enhanced audio signals in phase with the external sounds using an audio rendering device. An attendee at the live event can hear the sounds from the playback through an earphone coupled to the mobile computing device as well as from the ambient environment.

Abstract: Method and system for efficient character entry using a game controller. A computer implemented method allows a user to select any character in a subsection of a virtual input array by interacting with a single physical key on the game controller. Characters in a subsection of the virtual input array are arranged in a pattern. The number of keystrokes for selecting a particular character corresponds to the position of the particular character with reference to the pattern of the subsection.

Abstract: A flat panel electronic device and an audio playing apparatus thereof are provided. The audio playing apparatus comprises an audio generator, a plurality of speakers, a sensor and a controller. The audio generator is operable to generate a left channel audio and a right channel audio. The plurality of speakers are configured such that at least one pair of speakers is symmetrically disposed at a left side and a right side of the flat panel electronic device no matter how the flat panel electronic device is placed. The sensor is operable to detect a placed state of the flat panel electronic device in the installed state. The controller is operable to receive a detecting signal from the sensor so as to control the at least one pair of speakers to play the left channel audio and the right channel audio correspondingly according to the placed state of the flat panel electronic device.

Abstract: A power supply system. The power system includes a power supply controller for supplying a control signal. The power system also includes a plurality of MOSFET drivers controlled by the control signal. The power system also includes a plurality of power channels. Each of the power channels includes a plurality of MOSFETs that is controlled by a corresponding MOSFET driver. The plurality of power channels is configured to generate a plurality of power signals, wherein the control signal controls delivery of the plurality of power signals through each of the power channels.

Abstract: A method for rendering paths. The method includes accessing data comprising a path, stenciling the path, wherein a bounding region of a plurality of stencil samples updated during the stenciling is accumulated, and provoking GPU hardware to produce a rasterized region for covering the bounding region as one object without interior edges.

Abstract: A method for correcting a shift error in a fused multiply add operation. The method comprises adjusting a normalized floating-point number before performing a shift error correction to produce an adjusted normalized floating-point number, and correcting a shift error in the adjusted normalized floating-point number. The correcting the shift error comprises shifting a mantissa of the adjusted normalized floating-point number in one direction. A fused multiply add module comprising a normalizer module, a compensation logic, and a round. The normalizer module is operable to normalize a floating-point number to produce a normalized floating-point number. The floating-point number is normalized based upon an estimated quantity of leading zeros. The compensation logic is operable to manage a correction of a shift error in the normalized floating-point number. The rounder is operable to correct the shift error with a mantissa shift in only one direction.

Abstract: Methods are provided to perform area summation of various subsections of data values in a regular input array of one or several dimensions and varying sizes. The summation is achieved by adding up values from a ripmap of partial sums, where the partial sums are computed from the input array using a binary reduction method. According to such embodiments, the generation of the ripmap of partial sums will employ several binary reduction stages. Within each stage, a reduction operator is used that adds two elements along the respective direction. This is repeated until the output is only one element wide in the respective direction. The addresses of partial sums in the ripmap may subsequently be computed using a binary analysis of the target subsections in order to choose those partial sum values for a desired area that results in the desired area sum using an optimal number of data fetches.

Abstract: Data transfer techniques include transferring display surface data from a memory subsystem into a stutter buffer at a first rate until the stutter buffer is substantially full. The memory interface and/or memory of the memory subsystem may then be placed into a suspend state until the stutter buffer is substantially empty. The display surface data is transferred from the stutter buffer to display logic, at a second rate even when the memory subsystem is in a suspend state. The second rate, which is typically the rendering rate of the display, is substantially slower than the rate at which data is transferred into the stutter buffer.

Abstract: A method for using an average motion vector in a motion vector search process. The method includes accessing an input frame for processing and reading average motion vector information from memory. The method further includes performing a motion vector search by using the average motion vector and a plurality of hints, calculating a winner motion vector based on the average motion vector and the plurality of hints, and storing the winner motion vector back into memory to create a new updated average motion vector. The method further includes finishing processing the input frame using the winning motion vector.

Abstract: A method for automatically generating master-slave latch structures is disclosed. A method includes, from another logic synthesis system that invokes a logic synthesis system for generating master-slave latch structures, accessing high level design descriptions of a master-slave latch structure that indicate a fully registered flow control structure design and based on the high level design descriptions, generating a master-slave latch structure design to include at least one master-slave latch pair.

Abstract: Techniques for selecting a boot display device in the multi-GPU configured computing device include a graphic initialization routine for determining a topology of a plurality of GPUs. It is then determined if a display is coupled to any of the plurality of GPUs. The determination of whether the display is coupled to a GPU is communicated to the other of the plurality of GPUs based upon the determined topology. Thereafter, selection of a given GPU as a primary boot device, by a system initialization routine, is influenced by representing each GPU not coupled to the display as a graphics device and the GPUs coupled to a given display as the primary boot device if one or more displays are coupled to GPUs, and by representing the given GPU as the primary boot device and all other GPUs as graphics devices when the display is not coupled to any of the GPUs.

Abstract: A method for compiling a shader for execution by a graphics processor. The method comprises selecting a shader for execution. A key is computed for the selected shader. A memory is searched for a copy of the computed key. A shader binary stored in the memory is passed to the graphics processor for execution if the copy of the computed key is located in the memory. Otherwise, the shader is compiled to produce the shader binary for execution by the graphics processor and storing the shader binary in the memory. The shader binary is associated with the computed key and the copy of the computed key.

Abstract: A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.

Abstract: One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a single-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The single-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. The output signal Q is set or reset at the rising clock edge using a single-trigger sub-circuit. A set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.

Abstract: A method for graphics processor clock scaling comprises the following steps. A percentage of idle-time is calculated, based upon an elapsed idle-time and an elapsed active time. A graphics processor clock rate is reduced if the percentage of idle time is higher than a high limit threshold. The graphics processor clock rate is increased if the percentage of idle time is lower than a low limit threshold.

Abstract: Circuits, methods, and apparatus that perform a context switch quickly while not wasting a significant amount of in-progress work. A texture pipeline includes a cutoff point or stage. After receipt of a context switch instruction, texture requests and state updates above the cutoff point are stored in a memory, while those below the cutoff point are processed before the context switch is completed. After this processing is complete, global states in the texture pipeline are stored in the memory. A previous context may then be restored by reading its texture requests and global states from the memory and loading them into the texture pipeline. The location of the cutoff point can be a point in the pipeline where a texture request can no longer result in a page fault in the memory.

Abstract: Embodiments of the claimed subject matter are directed to methods and a system that use a standardized grid of clock buffers to automatically route clocks according to a uniform clock grid throughout an ASIC of a non-uniform arrangement of non-uniformly sized logic partitions. According to one embodiment, clock sources and sinks are mapped to grid point locations and a novel grid routing process is performed to link them together. A clock routing macro is assigned to a corresponding partition and associated with the corresponding partition or logic unit according to a partition hierarchy. The underlying routing structure and resources of a clock routing macro are automatically renamed to correspond to the local partition in a script or schedule of programmed instructions, or a routing map. The position of blockages within a partition may also be detected and alternate routes for traversing the blockage may be preemptively determined as well.

Abstract: In one embodiment, a car navigation device is provided. The device comprises: at least one wide-angle camera; a video correction unit for acquiring video data from the wide-angle lens and correcting the video data; a video merging unit for acquiring corrected video data from video correction unit and merging the corrected video data; an image recognition unit for acquiring video from the video merging unit and performing image recognition to the video; and a driving assistant unit for acquiring data from the image recognition unit and assisting driving in accordance with the recognized content. The navigation device provided by various embodiments in accordance with the present invention can correct and recognize the images taken by fisheye lens in real-time so as to assist the driver for driving or drive the car automatically without a human being.

Abstract: In one embodiment, a power adapter comprising: an input for coupling to an external power supply; a transformer module for converting the external power supply voltage to a voltage for an electronic device; a relay coupled between the input and the transformer module; a reset switch coupled to the relay for resetting the relay; a detection input for receiving a control signal from the electronic device to control operation of the relay; and an output for outputting the voltage for charging or supplying power to the electronic device, the output coupled to the transformer module and the relay.

Abstract: In one embodiment, a computer system comprises two or more graphics cards, each graphics card comprising: a graphics processing unit and an interface. An interface of the first graphics card is coupled to an interface of the second graphics card for enabling communication between the first and second graphics cards. A cable couples the interface of the first graphics card with the interface of the second graphics card. The transmitting speed of data exchanging between graphics cards of the computer system is increased, and the arrangement of the PCB (printed circuit board) of the graphics card is simple and the cost thereof is low.