Patents by Inventor NYSAL JAN K.A.

NYSAL JAN K.A. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10296395
    Abstract: Performing a rooted-v collective operation by an operational group of compute nodes in a parallel computer includes: upon encountering a rooted-v collection operation during execution, identifying, by a root node of an operational group of compute nodes, a count to use for the selection of a collective algorithm for effecting the rooted-v collective operation; broadcasting, by the root node to the other computer nodes in the operational group, an active message, wherein the active message includes the identified count to use for the selection of the collective algorithm; and selecting, by all the compute nodes of the operational group based on the identified count, a same collective algorithm to effect the rooted-v collective operation; and executing the rooted-v collective operation by all compute nodes of the operational group using the selected algorithm.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: May 21, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nysal Jan K. A., Sameh S. Sharkawi
  • Patent number: 9830186
    Abstract: Executing an all-to-allv operation on a parallel computer that includes a plurality of compute nodes, including: packing, by each task in an operational group of tasks, vectored contribution data from vectored storage in an all-to-allv contribution data buffer into an all-to-all contribution data buffer, wherein two or more entries in the all-to-allv contribution data buffer are different in size and each entry in the all-to-all contribution data buffer is identical in size; executing with the contribution data as stored in the all-to-all contribution data buffer an all-to-all collective operation by the operational group of tasks; and unpacking, by each task in the operational group of tasks, received contribution data from the all-to-all contribution data buffer into the vectored storage in an all-to-allv contribution data buffer.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: November 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Publication number: 20170322835
    Abstract: Performing a rooted-v collective operation by an operational group of compute nodes in a parallel computer includes: upon encountering a rooted-v collection operation during execution, identifying, by a root node of an operational group of compute nodes, a count to use for the selection of a collective algorithm for effecting the rooted-v collective operation; broadcasting, by the root node to the other computer nodes in the operational group, an active message, wherein the active message includes the identified count to use for the selection of the collective algorithm; and selecting, by all the compute nodes of the operational group based on the identified count, a same collective algorithm to effect the rooted-v collective operation; and executing the rooted-v collective operation by all compute nodes of the operational group using the selected algorithm.
    Type: Application
    Filed: May 9, 2016
    Publication date: November 9, 2017
    Inventors: NYSAL JAN K.A., SAMEH S. SHARKAWI
  • Patent number: 9772876
    Abstract: Executing an all-to-allv operation on a parallel computer that includes a plurality of compute nodes, including: packing, by each task in an operational group of tasks, vectored contribution data from vectored storage in an all-to-allv contribution data buffer into an all-to-all contribution data buffer, wherein two or more entries in the all-to-allv contribution data buffer are different in size and each entry in the all-to-all contribution data buffer is identical in size; executing with the contribution data as stored in the all-to-all contribution data buffer an all-to-all collective operation by the operational group of tasks; and unpacking, by each task in the operational group of tasks, received contribution data from the all-to-all contribution data buffer into the vectored storage in an all-to-allv contribution data buffer.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: September 26, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K.A., Sameh S. Sharkawi
  • Patent number: 9692673
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: June 27, 2017
    Assignee: International Business Machines Corporation
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Patent number: 9654365
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: May 16, 2017
    Assignee: Inernational Business Machines Corporation
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Publication number: 20170078172
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Application
    Filed: December 5, 2016
    Publication date: March 16, 2017
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Publication number: 20170078173
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Application
    Filed: December 5, 2016
    Publication date: March 16, 2017
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Patent number: 9571367
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: February 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Patent number: 9553784
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: January 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Patent number: 9513611
    Abstract: Adjusting environmental variables in an adaptive parameter adjustment runtime environment, including: executing a parallel program by the adaptive parameter adjustment runtime environment, including beginning operations with a set of default global parameter values; maintaining a list of configurable parameters; changing a parameter value for a parameter in the list of configurable parameters; determining whether an effect of changing the parameter value is positive, negative, or neutral; responsive to determining that the effect of changing the parameter value is positive, changing the parameter value for the parameter; responsive to determining that the effect of changing the parameter value is negative, changing the parameter value for the parameter to a previous value; and responsive to determining that the effect of changing the parameter value is neutral, performing a list management operation on the list of configurable parameters.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K.A., Sameh S. Sharkawi
  • Patent number: 9495204
    Abstract: Constructing a logical tree topology in a parallel computer that includes compute nodes, where each compute node includes a hardware acceleration unit and executes an identical number of tasks and the tasks of each node have a rank, includes: creating hardware acceleration groups, with each hardware acceleration group including one task from each node, where the one task from each node has the same rank; assigning one task of a root compute node as a global root of the logical tree topology; assigning tasks of the root compute node other than the global root as local children of the global root; and assigning each of the global root and local children of the root compute node as a root of a subtree of tasks, wherein each subtree comprises the tasks of a hardware acceleration group.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: November 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Patent number: 9495205
    Abstract: Constructing a logical tree topology in a parallel computer that includes compute nodes, where each compute node includes a hardware acceleration unit and executes an identical number of tasks and the tasks of each node have a rank, includes: creating hardware acceleration groups, with each hardware acceleration group including one task from each node, where the one task from each node has the same rank; assigning one task of a root compute node as a global root of the logical tree topology; assigning tasks of the root compute node other than the global root as local children of the global root; and assigning each of the global root and local children of the root compute node as a root of a subtree of tasks, wherein each subtree comprises the tasks of a hardware acceleration group.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: November 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Patent number: 9454139
    Abstract: Adjusting environmental variables in an adaptive parameter adjustment runtime environment, including: executing a parallel program by the adaptive parameter adjustment runtime environment, including beginning operations with a set of default global parameter values; maintaining a list of configurable parameters; changing a parameter value for a parameter in the list of configurable parameters; determining whether an effect of changing the parameter value is positive, negative, or neutral; responsive to determining that the effect of changing the parameter value is positive, changing the parameter value for the parameter; responsive to determining that the effect of changing the parameter value is negative, changing the parameter value for the parameter to a previous value; and responsive to determining that the effect of changing the parameter value is neutral, performing a list management operation on the list of configurable parameters.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: September 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Patent number: 9411777
    Abstract: In a parallel computer, performing a rooted-v collective operation by an operational group of compute nodes includes: identifying, in source code by a collective algorithm selection optimizing module, a gather operation followed by a rooted-v collective operation; replacing, by the collective algorithm selection optimizing module, the gather operation with an allgather operation; executing, by the compute nodes, the allgather operation; selecting, by each compute node in dependence upon results of the allgather operation, an algorithm for effecting the rooted-v collective operation; and executing, by each compute node, the rooted-v collective operation with the selected algorithm.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Publication number: 20160173348
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 16, 2016
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar
  • Patent number: 9348651
    Abstract: Constructing a logical tree topology in a parallel computer that includes compute nodes, where each node executes a number of tasks and at least one node executes a number of tasks different from another node includes: identifying a compute node executing a greatest number of tasks; selecting, as a global root, a task from the identified compute node, including assigning the task as a local root of the identified compute node and assigning each of the other tasks of the identified compute node as a child of the local root; selecting, from each of the other compute nodes, one task to be a local root, including assigning each task other than the local root as a child of the local root; and assigning each local root of the other compute nodes to be a child of one of the tasks of the identified compute node other than the global root.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K. A., Sameh S. Sharkawi
  • Patent number: 9336053
    Abstract: Constructing a logical tree topology in a parallel computer that includes compute nodes, where each node executes a number of tasks and at least one node executes a number of tasks different from another node includes: identifying a compute node executing a greatest number of tasks; selecting, as a global root, a task from the identified compute node, including assigning the task as a local root of the identified compute node and assigning each of the other tasks of the identified compute node as a child of the local root; selecting, from each of the other compute nodes, one task to be a local root, including assigning each task other than the local root as a child of the local root; and assigning each local root of the other compute nodes to be a child of one of the tasks of the identified compute node other than the global root.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: May 10, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Nysal Jan K.A., Sameh S. Sharkawi
  • Publication number: 20160077998
    Abstract: In a parallel computer, performing a rooted-v collective operation by an operational group of compute nodes includes: identifying, in source code by a collective algorithm selection optimizing module, a gather operation followed by a rooted-v collective operation; replacing, by the collective algorithm selection optimizing module, the gather operation with an allgather operation; executing, by the compute nodes, the allgather operation; selecting, by each compute node in dependence upon results of the allgather operation, an algorithm for effecting the rooted-v collective operation; and executing, by each compute node, the rooted-v collective operation with the selected algorithm.
    Type: Application
    Filed: September 16, 2014
    Publication date: March 17, 2016
    Inventors: CHARLES J. ARCHER, NYSAL JAN K.A., SAMEH S. SHARKAWI
  • Publication number: 20160036669
    Abstract: Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms. The consideration of jitter includes consideration of “system jitter” (OS jitter and/or network jitter). In some embodiments, multiple rankings are performed for different levels of system jitter.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 4, 2016
    Inventors: Saurav K. Jha, Nysal Jan K. A., Saumil G. Merchant, Giridhar M. Prabhakar