Patents by Inventor O-Kyong Kwon

O-Kyong Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making high voltage metal oxide silicon field effect transistor
    Patent number: 6033948
    Abstract: A manufacturing method of high voltage MOSFET includes a process forming the first and second conductive wells in a semiconductor substrate; process forming drift areas in the first and second conductive wells; process growing an isolation membrane on the substrate surface between the first and second conductive wells; process forming a gate insulation film; process forming a gate on the gate insulation film above the first and second conductive wells; process forming low concentration n-and p-type dopant areas in the drift areas of the parts adjacent to the gate; process forming buried diffusion areas in the first and second conductive wells; process forming source/drain having a body contact on a side on the buried diffusion areas in the first and second conductive wells; process forming an insulation film having a contact formed in such way that is exposed the surface of source/drain on the entire surface of the substrate including the gate and isolation membrane; process forming a metal film on the insula
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: March 7, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventors: O-Kyong Kwon, Hoon-Ho Jeong
  • High voltage metal oxide silicon field effect transistor
    Patent number: 5831320
    Abstract: A manufacturing method of high voltage MOSFET includes a process forming the first and second conductive wells in a semiconductor substrate; process forming drift areas in the first and second conductive wells; process growing an isolation membrane on the substrate surface between the first and second conductive wells; process forming a gate insulation film; process forming a gate on the gate insulation film above the first and second conductive wells; process forming low concentration n- and p-type dopant areas in the drift areas of the parts adjacent to the gate; process forming buried diffusion areas in the first and second conductive wells; process forming source/drain having a body contact on a side on the buried diffusion areas in the first and second conductive wells; process forming an insulation film having a contact formed in such way that is exposed the surface of source/drain on the entire surface of the substrate including the gate and isolation membrane; process forming a metal film on the insul
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: November 3, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventors: O-Kyong Kwon, Hoon-Ho Jeong