Abstract: A transient voltage suppressor (TVS) with virtually no inductance in a shunt current path, thus providing optimal fast-rise transient voltage spike protection. A planar thru-conductor is operably coupled to the entire length of a cathode side surface of a TVS chip thereby reducing the inductance through the TVS chip to ground. The virtually zero inductance through the shunt current path allows the TVS chip to effectively limit fast-rise transient voltage spikes to safe levels, and prevents generating leak-thru energy that could cause a latch-up condition or destructive effects. Provision is made to suppress long duration transient pulses is available through affixing the TVS to a larger thermal mass providing the necessary heat sinking to absorb the additional power dissipated during these events.

Abstract: The present invention is directed to a semiconductor device and method wherein a vertical opening is provided or formed completely through a semiconductor substrate of the semiconductor device to print an external electrical contact to be made to one of the semiconductor regions of the semiconductor substrate. In the disclosed embodiment an electrical contact is also provided to the bottom portion of the semiconductor substrate.

Abstract: A surge suppressor suitable for protecting railroad switching systems from lightning directly striking a rail of a railroad track includes a pair of spark gap surge suppressors each coupled between a ground conductor and a corresponding rail. A spark gap equalizer is connected between the first and second conductors coupled to the rails, respectively. A first inductor is connected between the first conductor and a first output terminal, which is coupled to an input of the railroad switching system. A second inductor is connected between the second conductor and a second output, which is connected to another input of the railroad switching system. A first surge suppressor diode is connected between the first and second output conductors, and a second surge suppressor diode is connected in the opposite direction between the first and second output conductors.

Abstract: A solid state electromagnetic pulse suppressor includes first and second external input terminals and first and second external output terminals. The pulse suppressor also includes first and second conductors. The first conductor is electrically connected between the first input terminal and the first output terminal. The second conductor is electrically connected between the second input terminal and the second output terminal. A pulse suppressor element having first and second electrodes has its first electrode attached to an intermediate portion of the first conductor and has its second electrode attached to an intermediate portion of the second conductor. The pulse suppressor element and the portions of the first and second conductors attached thereto are contained in a package.

Abstract: An AC line transient suppressor includes a first metal oxide varistor connected between the "hot" and "neutral" lines of an AC power system. A first inductor is connected from the hot line to one terminal of a second metal oxide varistor, the other terminal of which is connected to the neutral line. A second inductor having approximately twice the value of the first one is connected from the junction between the first inductor and the second metal oxide varistor to a hot supply terminal to which equipment to be protected is connected. A silicon suppressor having a predetermined clamping voltage is coupled between the hot supply terminal and the neutral line conductor. The inductance of the first inductor has a value selected to divert approximately 95% of the transient surge current through the first metal oxide varistor.

Abstract: A solid state electromagnetic pulse suppressor includes first and second external input terminals and first and second external output terminals. The pulse suppressor also includes first and second conductors. The first conductor is electrically connected between the first input terminal and the first output terminal. The second conductor is electrically connected between the second input terminal and the second output terminal. A pulse suppressor element having first and second electrodes has its first electrode attached to an intermediate portion of the first conductor and has its second electrode attached to an intermediate portion of the second conductor. The pulse suppressor element and the portions of the first and second conductors attached thereto are contained in a package.