Patents by Inventor Omin Kwon

Omin Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959691
    Abstract: A refrigerator includes a cabinet and a door. The door includes a door body filled with an insulator and a door panel detachably mounted on the door body. The door panel includes a panel defining a front appearance of the door, and a panel bracket disposed on a rear surface of the panel and including a mounting protrusion protruding rearward. The door body includes a cap deco that defines a portion of a perimeter surface of the door body and includes a protrusion accommodating part receiving the mounting protrusion, and a deco cover that shields an opening of the cap deco and includes a restraining protrusion protruding into the cap deco. The restraining protrusion is in contact with the protrusion accommodating part when the deco cover is mounted and maintains a restrained state of the mounting protrusion and the protrusion accommodating part.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: April 16, 2024
    Assignee: LG Electronics Inc.
    Inventors: Omin Kwon, Sanghyun Cheon
  • Publication number: 20240055368
    Abstract: A semiconductor device and a method for making the same are provided. The semiconductor device includes: a substrate; an electronic component mounted on the substrate; a first encapsulant disposed on the substrate and encapsulating the electronic component; and a first electromagnetic interference (EMI) shielding layer disposed on the first encapsulant, wherein the first EMI shielding layer includes a first plurality of shield protrusions each having one or more inclined sidewalls.
    Type: Application
    Filed: August 10, 2023
    Publication date: February 15, 2024
    Inventors: ChangOh KIM, JinHee JUNG, OMin KWON
  • Publication number: 20240021536
    Abstract: A semiconductor device has a substrate and encapsulant deposited over the substrate. An electrical connector is disposed over the substrate outside the encapsulant. An antenna can be formed over the substrate. A first shielding material is disposed over a portion of the encapsulant without covering the electrical connector with the first shielding material. The first shielding material is disposed over the portion of the encapsulant and the portion of the substrate using a direct jet printer. A cover is disposed over the electrical connector. A second shielding material is disposed over the encapsulant to prevent the second shielding material from reaching the electrical connector. The second shielding material overlaps the first shielding material and covers a side surface of the encapsulant and a side surface of the substrate. The cover is removed to expose the electrical connector free of shielding material.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, JinHee Jung, OMin Kwon
  • Publication number: 20240014093
    Abstract: A semiconductor device has a first substrate and electrical component disposed over the first substrate. A graphene layer is disposed over the electrical component, and a thermal interface material is disposed between the graphene layer. A heat sink is disposed over the thermal interface material. The graphene layer, in combination with the thermal interface material, aids with the heat transfer between the electrical component and heat sink. The graphene layer may be disposed over a second substrate made of copper. An encapsulant is deposited over the first substrate and around the electrical component and graphene substrate. The thermal interface material and heat sink may extend over the encapsulant. The heat sink can have vertical or angled extensions from the horizontal portion of the heat sink down to the substrate. The heat sink can extend over multiple modules.
    Type: Application
    Filed: July 6, 2022
    Publication date: January 11, 2024
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, JinHee Jung, OMin Kwon, HeeSoo Lee
  • Publication number: 20240006335
    Abstract: A semiconductor device has a substrate. A semiconductor die is disposed over the substrate. A first encapsulant is deposited over the semiconductor die. A ferromagnetic film is disposed over the first encapsulant. A second encapsulant is deposited over the ferromagnetic film. A shielding layer is optionally formed over the substrate, first encapsulant, and second encapsulant.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, JinHee Jung, OMin Kwon
  • Patent number: 11862478
    Abstract: A semiconductor device has a semiconductor package including a substrate with a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A metal mask having a fiducial marker is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The metal mask is removed after forming the shielding layer.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: January 2, 2024
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20230275034
    Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 31, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: HunTeak Lee, KyungHwan Kim, HeeSoo Lee, ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20230207485
    Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.
    Type: Application
    Filed: February 27, 2023
    Publication date: June 29, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Patent number: 11664327
    Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: May 30, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: HunTeak Lee, KyungHwan Kim, HeeSoo Lee, ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Patent number: 11616025
    Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 28, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20230010034
    Abstract: A refrigerator includes a cabinet and a door. The door includes a door body filled with an insulator and a door panel detachably mounted on the door body. The door panel includes a panel defining a front appearance of the door, and a panel bracket disposed on a rear surface of the panel and including a mounting protrusion protruding rearward. The door body includes a cap deco that defines a portion of a perimeter surface of the door body and includes a protrusion accommodating part receiving the mounting protrusion, and a deco cover that shields an opening of the cap deco and includes a restraining protrusion protruding into the cap deco. The restraining protrusion is in contact with the protrusion accommodating part when the deco cover is mounted and maintains a restrained state of the mounting protrusion and the protrusion accommodating part.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 12, 2023
    Inventors: Omin KWON, Sanghyun CHEON
  • Publication number: 20220310408
    Abstract: A semiconductor device has a semiconductor package including a substrate with a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A metal mask having a fiducial marker is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The metal mask is removed after forming the shielding layer.
    Type: Application
    Filed: June 14, 2022
    Publication date: September 29, 2022
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Patent number: 11393698
    Abstract: A semiconductor device has a semiconductor package including a substrate with a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A metal mask having a fiducial marker is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The metal mask is removed after forming the shielding layer.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: July 19, 2022
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20220199545
    Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20220199423
    Abstract: A semiconductor device has a semiconductor package including a substrate with a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A metal mask having a fiducial marker is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The metal mask is removed after forming the shielding layer.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Publication number: 20220157739
    Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.
    Type: Application
    Filed: November 17, 2020
    Publication date: May 19, 2022
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: HunTeak Lee, KyungHwan Kim, HeeSoo Lee, ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Patent number: 9673171
    Abstract: An integrated circuit packaging system and method of manufacture thereof includes: providing a semiconductor die having semiconductor die contacts; depositing an insulation layer on the semiconductor die including the semiconductor die contacts exposed; applying a conductive layer on the semiconductor die contacts and the insulation layer; and coupling system interconnects to the conductive layer for electrically connecting the semiconductor die to the system interconnects.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: June 6, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: HeeJo Chi, HeeSoo Lee, Omin Kwon