Patents by Inventor Ock Kim

Ock Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119994
    Abstract: A memory device includes: a first memory cell mat that includes first multi-layer level sub word lines positioned over a substrate; a second memory cell mat that is laterally spaced apart from the first memory cell mat and includes second multi-layer level sub word lines; a first sub word line driver circuit that is positioned underneath the first memory cell mat; and a second sub word line driver circuit that is positioned underneath the second memory cell mat, wherein the first sub word line driver circuit is positioned underneath ends of the first multi-layer level sub word lines, and the second sub word line driver circuit is positioned underneath ends of the second multi-layer level sub word lines.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Seung-Hwan KIM, Su-Ock CHUNG, Seon-Yong CHA
  • Publication number: 20240121948
    Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Jae Man YOON, Jin Hwan JEON, Tae Kyun KIM, Jung Woo PARK, Su Ock CHUNG, Jae Won HA
  • Publication number: 20240075318
    Abstract: The present disclosure relates to a method for carrying out dose delivery quality assurance for high-precision radiation treatment, in which parameters affecting a pass rate of dose delivery quality assurance can be derived through regression analysis, which is a known statistical analysis method, and a pass rate prediction model capable of predicting each parameter and the pass rate of dose delivery quality assurance can be derived, and accordingly, it can be predicted in advance whether dose delivery quality assurance will be passed according to the parameters through the above prediction model, without repeatedly carrying out dose delivery quality assurance according to a patient's treatment plan, and as a result, the efficiency of dose delivery quality assurance can be enhanced, and the time or capacity required for such quality assurance is reduced, such that radiation treatment for an actual patient can be quickly and precisely carried out.
    Type: Application
    Filed: December 22, 2021
    Publication date: March 7, 2024
    Inventors: Young Nam KANG, Ji Na KIM, Hong Seok JANG, Byung Ock CHOI, Yun Ji SEOL, Tae Geon OH, Na Young AN, Jae Hyeon LEE, Kyu Min HAN, Ye Rim SHIN
  • Publication number: 20240074008
    Abstract: The present invention relates to a base plate structure facilitating heat discharge of a heating coil. According to some embodiment of the present invention, the base plate structure comprises a circular base plate where at least one or more hall effect sensors are disposed in a center sensor portion. One or more unit mounting groove portions are defined by a closed partition wall protruding from a lower side of the base plate. One or more protrusion portions protrude from an upper side of the base plate such that the heating coil wound in the upper side of the base plate is spaced apart from the upper side of the base plate. One or more heat discharge openings are provided in a bottom side of the unit mounting groove portions.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 29, 2024
    Inventors: Myung Ock LEE, Sang Woo KIM
  • Publication number: 20240009644
    Abstract: The present invention relates to a method for preparing multilayer spherical particles and, more specifically, to a method for preparing multilayer spherical particles comprising the steps of: (i) preparing a core component comprising an active ingredient and a shell solution comprising a first polymer component; (ii) forming the core component and shell solution of step (i) into core-shell particles by electro-coextrusion; (iii) drying the core-shell particles obtained from step (ii); and (iv) capsulizing the dried core-shell particles of step (iii) by means of a second polymer. Further, the present invention relates to a cosmetic composition comprising multilayer spherical particles prepared by the method.
    Type: Application
    Filed: November 25, 2021
    Publication date: January 11, 2024
    Inventors: Hong Geun JI, Young Ah PARK, Yu Jin KANG, Dong Ock KIM, Tae Kyung LEE
  • Publication number: 20230364170
    Abstract: The present invention relates to a pharmaceutical composition for preventing or treating obesity or diabetes, and to a food composition and feed composition for preventing or alleviating obesity or diabetes, comprising as an active ingredient, an Acanthopanax extract, a garcinia cambogia extract, or compounds isolated therefrom. The composition has synergistic antidiabetic and antiobesity activity compared to that of using only an Acanthopanax extract, a garcinia cambogia extract, or compounds isolated therefrom. Therefore, it is possible to reduce the possibility of any side effects that may be caused by an overdose of or long-term administration of the garcinia cambogia extract and a substance isolated therefrom, and thus the composition can be very effectively utilized in the development of a therapeutic agent for diabetes or obesity.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 16, 2023
    Applicant: KOREA RESEARCH INSTITUTE OF BIOSCIENCE AND BIOTECHNOLOGY
    Inventors: Su Ui LEE, Hyung Won RYU, Mun Ock KIM, Sei Ryang OH, Doo Young KIM, Hyun Jae JANG
  • Publication number: 20220411502
    Abstract: The present disclosure relates to an antibody against c-kit or antigen-binding fragment thereof, a nucleic acid encoding the same, a vector including the nucleic acid, a cell transformed with the vector, a method for producing the antibody or antigen-binding fragment thereof, a composition for preventing or treating an angiogenic disease containing the same, and a composition for preventing or treating cancer.
    Type: Application
    Filed: November 24, 2020
    Publication date: December 29, 2022
    Applicant: NOVELTY NOBILITY INC.
    Inventors: Sang Gyu PARK, Kwang-Hyeok KIM, Jin-Ock KIM
  • Patent number: 11226451
    Abstract: A 3D optical switch for transferring an optical signal between a plurality of layers of an optical integrated circuit, which comprises: a first optical coupler for distributing the optical signal input to a first optical waveguide deployed in a first layer among the plurality of layers to a second optical waveguide deployed in a second layer different from the first layer; a phase shifter for changing a phase of a first optical signal in the first optical waveguide passing through the first optical coupler and a phase of a second optical signal in the second optical waveguide distributed by the first optical coupler; and a second optical coupler for combining the first optical signal of which the phase is changed and the second optical signal of which the phase is changed is provided.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: January 18, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jaegyu Park, Gyung Ock Kim, Jiho Joo
  • Publication number: 20210355212
    Abstract: The present invention relates to a novel anti-C-KIT antibody or an antibody fragment thereof. In addition, the present invention relates to a composition for preventing or treating angiogenesis-related diseases comprising the anti-C-KIT antibody or an antibody fragment thereof, or a kit for diagnosing angiogenesis-related diseases.
    Type: Application
    Filed: October 10, 2019
    Publication date: November 18, 2021
    Applicant: NOVELTY NOBILITY INC.
    Inventors: Sang Gyu PARK, Jin-Ock KIM
  • Patent number: 10928442
    Abstract: Computer implemented methods of designing integrated circuits and computing systems are provided. A computer implemented method of designing an integrated circuit according to the inventive concepts may be performed by a processor and may include performing a placement and routing (P&R) operation for standard cells defining the integrated circuit, extracting characteristic values from a result of the P&R operation, generating a physical-aware annotation file by determining a plurality of representative characteristic values that respectively correspond to a plurality of groups based on the extracted characteristic values, and performing a physical-aware synthesis operation to generate a netlist from input data for the integrated circuit, based on the generated physical-aware annotation file.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 23, 2021
    Inventors: Tae-il Kim, Jae-hoon Kim, Hyung-ock Kim, Jung-yun Choi
  • Patent number: 10817640
    Abstract: A method of generating an integrated circuit design includes receiving input data defining input cells of the integrated circuit design, selecting first standard cells from a first standard cell library to represent the input cells having a first characteristic, selecting second standard cells from a second standard cell library to represent the input cells having a second characteristic different from the first characteristic, and generating output data representing the integrated circuit design by performing placement and routing on the selected first standard cells and the selected second standard cells. The first standard cell library includes a first type of standard cells manufactured using a first diffusion break scheme. The second standard cell library includes a second type of standard cells manufactured using a second diffusion break scheme. Each of the second type of standard cells has a same function as a respective one of the first type of standard cells.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Hoon Kim, Yong-Durk Kim, Woo-Tae Kim, Hyung-Ock Kim, Joon-Young Shin
  • Patent number: 10817637
    Abstract: A system and method of designing an integrated circuit (IC) by considering a local layout effect are provided. The method of designing an IC may place instances of pre-placement cells so as to decrease occurrence of a local layout effect (LLE) causing structure. The method may extract a context of an instance from a peripheral layout of each of the placed instances to estimate an LLE of the instance, thereby analyzing a performance of the IC.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Naya Ha, Yong-Durk Kim, Bong-hyun Lee, Hyung-ock Kim, Kwang-ok Jeong, Jae-hoon Kim
  • Publication number: 20200241209
    Abstract: A 3D optical switch for transferring an optical signal between a plurality of layers of an optical integrated circuit, which comprises: a first optical coupler for distributing the optical signal input to a first optical waveguide deployed in a first layer among the plurality of layers to a second optical waveguide deployed in a second layer different from the first layer; a phase shifter for changing a phase of a first optical signal in the first optical waveguide passing through the first optical coupler and a phase of a second optical signal in the second optical waveguide distributed by the first optical coupler; and a second optical coupler for combining the first optical signal of which the phase is changed and the second optical signal of which the phase is changed is provided.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 30, 2020
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jaegyu PARK, Gyung Ock KIM, Jiho JOO
  • Publication number: 20200151298
    Abstract: A method of generating an integrated circuit design includes receiving input data defining input cells of the integrated circuit design, selecting first standard cells from a first standard cell library to represent the input cells having a first characteristic, selecting second standard cells from a second standard cell library to represent the input cells having a second characteristic different from the first characteristic, and generating output data representing the integrated circuit design by performing placement and routing on the selected first standard cells and the selected second standard cells. The first standard cell library includes a first type of standard cells manufactured using a first diffusion break scheme. The second standard cell library includes a second type of standard cells manufactured using a second diffusion break scheme. Each of the second type of standard cells has a same function as a respective one of the first type of standard cells.
    Type: Application
    Filed: May 23, 2019
    Publication date: May 14, 2020
    Inventors: JAE-HOON KIM, YONG-DURK KIM, WOO-TAE KIM, HYUNG-OCK KIM, JOON-YOUNG SHIN
  • Patent number: 10599130
    Abstract: A method of manufacturing an integrated circuit (IC) including instances of standard cells includes arranging a first instance and arranging a second instance adjacent to the first instance. The second instance has a front-end layer pattern corresponding to a context group of the first instance. The context group includes information about front-end layer patterns of instances, the front-end layer patterns causing a same local layout effect (LLE) on the first instance and arranged adjacent to the first instance.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: March 24, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wootae Kim, Hyung-Ock Kim, Jaehoon Kim, Naya Ha, Ki-Ok Kim, Eunbyeol Kim, Jung Yun Choi, Sun Ik Heo
  • Patent number: 10424518
    Abstract: A method of manufacturing an integrated circuit may include placing cells, based on input data defining the integrated circuit, performing a pin reordering operation on a plurality of pins in a first cell of the cells, based on physical information regarding the pins in the first cell, wherein the physical information is determined based on the placement of the cells, performing a routing operation on the cells after the pin reordering operation, and manufacturing the integrated circuit, based on a layout produced by the routing operation.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: September 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Il Kim, Hyung-Ock Kim, Woo Young Noh, Jung Yun Choi
  • Patent number: 10404828
    Abstract: Provided are a streaming apparatus, a streaming method, and a streaming service system using the streaming apparatus, wherein the streaming apparatus includes: a scheduler configured to generate a modified metafile by modifying a reproduction list file of a metafile; and a server socket configured to transmit the modified metafile when a metafile transmit request is received from a player by operating as a server with respect to the player. Accordingly, delay times of players are substantially the same.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: September 3, 2019
    Assignee: Naver Corporation
    Inventors: Sung Tak Cho, Sung Ho Kim, Joon Kee Chang, Min Hee Choi, Ki Su Park, Kyoung Yun Kang, Young Min Kim, Dong Ock Kim, Eun Sun Shin
  • Publication number: 20180231604
    Abstract: Computer implemented methods of designing integrated circuits and computing systems are provided. A computer implemented method of designing an integrated circuit according to the inventive concepts may be performed by a processor and may include performing a placement and routing (P&R) operation for standard cells defining the integrated circuit, extracting characteristic values from a result of the P&R operation, generating a physical-aware annotation file by determining a plurality of representative characteristic values that respectively correspond to a plurality of groups based on the extracted characteristic values, and performing a physical-aware synthesis operation to generate a netlist from input data for the integrated circuit, based on the generated physical-aware annotation file.
    Type: Application
    Filed: December 14, 2017
    Publication date: August 16, 2018
    Inventors: Tae-il Kim, Jae-hoon Kim, Hyung-ock Kim, Jung-yun Choi
  • Publication number: 20180210421
    Abstract: A method of manufacturing an integrated circuit (IC) including instances of standard cells includes arranging a first instance and arranging a second instance adjacent to the first instance. The second instance has a front-end layer pattern corresponding to a context group of the first instance. The context group includes information about front-end layer patterns of instances, the front-end layer patterns causing a same local layout effect (LLE) on the first instance and arranged adjacent to the first instance.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 26, 2018
    Inventors: WOOTAE KIM, Hyung-Ock Kim, Jaehoon Kim, Naya Ha, Ki-Ok Kim, Eunbyeol Kim, Jung Yun Choi, Sun Ik Heo
  • Patent number: 10026471
    Abstract: A system-on-chip and an electronic device including the system-on-chip are provided. The system-on-chip includes a power switch, a logic block, a memory device, and a buffer. The power switch is coupled between a first power supply line and a virtual power supply line, and turns on in response to a switch control signal. The logic block is coupled between the virtual power supply line and a ground line. The memory device is coupled between a second power supply line and the ground line. The buffer is coupled between the second power supply line and the ground line, and generates the switch control signal based on a sleep signal.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: July 17, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-Sub Shin, Jae-Han Jeon, Hyung-Ock Kim