Patents by Inventor Oded Oren

Oded Oren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10394699
    Abstract: A method for reuse of a refinement file in coverage grading, may include obtaining a refinement file that includes a listing of coverage entities of a first coverage model, for exclusion from a calculation of coverage grading of the first coverage model; obtaining mapping information to map a source path of each of the modules or instances of a module, that include one or more of said coverage entities in the first coverage model to a target path of each of said modules or instances of a module in a second coverage model; and using a processor, based on the refinement file and the mapping information, translating a source path of each of said coverage entities listed in the refinement file to a target path of a coverage entity of the coverage entities in the second coverage model.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: August 27, 2019
    Assignee: Cadence Design Systems, Inc.
    Inventors: Yael Kinderman, Oded Oren, Yaara Gradovitch
  • Patent number: 9891281
    Abstract: A method includes receiving from a user, via a user interface, coverage-event characteristics. Using a processor, output data of test runs executed on a device-under-test is analyzed to identify one or a plurality of coverage events that possess the coverage-event characteristics and to identify one or a plurality of contributing test runs in said test runs that contributed to said one or a plurality of coverage events. Information on said one or a plurality of contributing test runs is outputted via an output device.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 13, 2018
    Assignee: Cadence Design Systems, Inc.
    Inventors: Yael Kinderman, Erez Bashi, Oded Oren
  • Patent number: 9824175
    Abstract: A method for automatically verifying validity of application of a refinement rule includes calculating a set of values that characterize a hierarchy of elements of the emulation. A currently calculated value for a first element at a first level of the hierarchy is compared with a previously calculated value that characterized the first element at a previous time. If the currently calculated value is the same as the previously calculated value, application of the refinement rule is determined to be valid for unnamed entities of the first element. If the currently calculated value is different from the previously calculated value, each currently calculated value that characterizes a lower level element at a lower level of the hierarchy is compared with a corresponding previously calculated value to identify a change and it is determined whether the change invalidates application of the refinement rule to an unnamed entity of the emulation.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: November 21, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hemant Gupta, Nili Segal, Yael Kinderman, Oded Oren
  • Patent number: 9582620
    Abstract: A computer implemented method and system for exclusion of entities from a metric driven verification analysis score. The method includes using a processor, and performing the following steps: parsing a source code simulating a device under test and modeling the source code into a model that includes entities of one or a plurality of metric driven entity types; identifying in the source code entities of the same metric driven entity type of said one or a plurality of metric driven entity types that are logically linked and saving information on the identified entities that are logically linked; receiving from a user a selection of an entity to be excluded from the metric driven verification analysis score; and excluding all instances of the selected entity and all instances of the identified entities that are logically linked to the selected entity from a calculation of the metric driven verification score.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: February 28, 2017
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Nili Segal, Yael Kinderman, Hemant Gupta, Oded Oren