Patents by Inventor Oded Raz

Oded Raz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220252806
    Abstract: An optical interconnect includes CMOS drivers/receivers, vertical cavity surface emitting lasers (VCSEL) or photo detectors (PD), a silicon interposer having a electrical interface connected to a pattern of wet etched square-box shape optical through silicon vias (OTSV), the CMOS drivers/receivers are connected to the electrical interface, the VCSEL/PDs are connected to the end of the electrical interface, each input/output signal of the VCSEL/PDs are aligned with the pattern of OTSVs, an optical interface (OI) connected to a second side of the interposer, the optical interface is aligned with the OTSVs, the optical interface planar surface is on the silicon interposer second side and a pattern lenses opposite the planar surface and match the OTSVs, and a lensed ferrule having a pattern of lenses arranged to match the pattern of optical interface lenses, the ferrule connects with optical fiber arrays to directly connect to all the drivers or receivers.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 11, 2022
    Inventors: Chenhui Li, Oded Raz, Ripalta Stabile
  • Publication number: 20210364717
    Abstract: An optical interconnect includes CMOS drivers/receivers, vertical cavity surface emitting lasers (VCSEL) or photo detectors (PD), a silicon interposer having a electrical interface connected to a pattern of wet etched square-box shape optical through silicon vias (OTSV), the CMOS drivers/receivers are connected to the electrical interface, the VCSEL/PDs are connected to the end of the electrical interface, each input/output signal of the VCSEL/PDs are aligned with the pattern of OTSVs, an optical interface (01) connected to a second side of the interposer, the optical interface is aligned with the OTSVs, the optical interface planar surface is on the silicon interposer second side and a pattern lenses opposite the planar surface and match the OTSVs, and a lensed ferrule having a pattern of lenses arranged to match the pattern of optical interface lenses, the ferrule connects with optical fiber arrays to directly connect to all the drivers or receivers.
    Type: Application
    Filed: September 7, 2018
    Publication date: November 25, 2021
    Inventors: Chenhui Li, Oded Raz, Ripalta Stabile
  • Patent number: 9876329
    Abstract: An optical interconnect device is provided that includes a first vertical cavity of surface emitting laser (VCSEL), connected in parallel with a second VCSEL, an optical coupler that is configured to direct the light output from the first VCSEL and the second VCSEL to a single optical fiber, where a common connection of each VCSEL is controlled using a MOSFET/inverter, where in normal operation only one of the first VCSEL or the second VCSEL is enabled, where a common connection of each VCSEL is not directly connected to a ground, and a microcontroller that is configured to switch output from the first VCSEL to the second VCSEL in the event of failure by the first VCSEL, where a failure of the first VCSEL does not result a communication in link failure.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: January 23, 2018
    Assignee: Technische Universiteit Eindhoven
    Inventors: Oded Raz, Teng Li
  • Publication number: 20170040772
    Abstract: An optical interconnect device is provided that includes a first vertical cavity of surface emitting laser (VCSEL), connected in parallel with a second VCSEL, an optical coupler that is configured to direct the light output from the first VCSEL and the second VCSEL to a single optical fiber, where a common connection of each VCSEL is controlled using a MOSFET/inverter, where in normal operation only one of the first VCSEL or the second VCSEL is enabled, where a common connection of each VCSEL is not directly connected to a ground, and a microcontroller that is configured to switch output from the first VCSEL to the second VCSEL in the event of failure by the first VCSEL, where a failure of the first VCSEL does not result a communication in link failure.
    Type: Application
    Filed: October 5, 2016
    Publication date: February 9, 2017
    Inventors: Oded Raz, Teng Li
  • Patent number: 9331790
    Abstract: A completely digital optical receiver is provided. The optical receiver includes a photodiode configured to provide a photodiode output responsive to an on-off keyed (OOK) optical input. Two or more digital inverters connected in series with each other are configured to receive the photodiode output and provide an amplified digital output. A digital clock and data recovery (CDR) circuit receives the amplified digital output and provides a clock output and a data output. A digital photodiode discharging circuit is connected to the photodiode and controlled by the clock output of the CDR circuit.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: May 3, 2016
    Assignee: Technische Universiteit Eindhoven
    Inventors: Harmen Joseph Sebastiaan Dorren, Oded Raz
  • Patent number: 9331051
    Abstract: A method and device for interconnecting stacked die surfaces with electrically conductive traces is provided that includes bonding, using a first layer of a photoresist compound, a second die (2) on top of a first die (1), heating the first layer above a pyrolyzation point of the photoresist compound, where the photoresist compound transitions to a stable layer, depositing a second layer of the photoresist compound (PR), using lithography, from a top surface of the first die (1) to a top surface of the second die (2), heating the second photoresist compound layer to a liquid state, where the liquid photoresist compound forms a smooth convex bridge between the first die (1) top surface and the second die (2) top surface, and depositing an electrically conductive layer on the smooth convex bridge, where an electrically conductive trace is formed between the first die (1) top surface and the second die (2) top surface.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: May 3, 2016
    Assignee: Technische Universiteit Eindhoven
    Inventors: Pinxiang Duan, Elbertus Smalbrugge, Oded Raz, Harmen Joseph Sebastiaan Dorren
  • Publication number: 20150104198
    Abstract: A completely digital optical receiver is provided. The optical receiver includes a photodiode configured to provide a photodiode output responsive to an on-off keyed (OOK) optical input. Two or more digital inverters connected in series with each other are configured to receive the photodiode output and provide an amplified digital output. A digital clock and data recovery (CDR) circuit receives the amplified digital output and provides a clock output and a data output. A digital photodiode discharging circuit is connected to the photodiode and controlled by the clock output of the CDR circuit.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Inventors: Harmen Joseph Sebastiaan Dorren, Oded Raz
  • Publication number: 20140300008
    Abstract: A method and device for interconnecting stacked die surfaces with electrically conductive traces is provided that includes bonding, using a first layer of a photoresist compound, a second die (2) on top of a first die (1), heating the first layer above a pyrolyzation point of the photoresist compound, where the photoresist compound transitions to a stable layer, depositing a second layer of the photoresist compound (PR), using lithography, from a top surface of the first die (1) to a top surface of the second die (2), heating the second photoresist compound layer to a liquid state, where the liquid photoresist compound forms a smooth convex bridge between the first die (1) top surface and the second die (2) top surface, and depositing an electrically conductive layer on the smooth convex bridge, where an electrically conductive trace is formed between the first die (1) top surface and the second die (2) top surface.
    Type: Application
    Filed: November 1, 2012
    Publication date: October 9, 2014
    Inventors: Pinxiang Duan, Elbertus Smalbrugge, Oded Raz, Harmen Joseph Sebastiaan Dorren