Abstract: Various systems to achieve data resiliency in a shared memory pool are presented. Multiple memory modules are associated with multiple data interfaces, one or multiple erasure-coding interfaces are communicatively connected with the multiple data interfaces, and multiple compute elements are communicatively connected with one or multiple erasure-coding interfaces. Data sets are erasure-coded, and the resulting fragments are stored in random access memory modules distributed throughout the system. Storage in RAM allows real-time fetching of fragments using random-access read cycles and streaming of fragments using random-access write cycles, in which read operations include reconstruction of data sets from fetched data fragments, and write operations allow conversion of data sets into fragments which are then streamed and distributively stored.

Abstract: Described herein are architectures, platforms and methods for implementing a direct estimation of a transmitter's position based upon raw radio frequency (RF) signals that are received by a portable device. A mathematical operation such as a maximum-likelihood estimation (MLE) algorithm, which utilizes collected snapshots from the received raw RF signals as variables, is implemented to perform direct estimation.

Abstract: Systems and methods are provided for communicating on a cellular telecommunications network. A system includes a receiver interface configured to receive an orthogonal frequency division multiplexing (OFDM) signal that includes transmitted data encoded according to a particular coding matrix. A processing unit is configured to receive the OFDM signal, where the processing unit is configured to decode data from the OFDM signal by solving a matrix optimization. A computer-readable memory is configured to store the decoded data.

Abstract: Embodiments of the present disclosure provide a method comprising providing 2-D or 3-D graphics content to a graphics processing module; processing the graphics content to generate a stream of images (e.g., three dimensional images and/or two dimensional images) for display, the stream having a frame rate; and governing a rate of processing the graphics content to limit the frame rate of the generated stream of images to be less than or equal to a frame rate threshold. Other embodiments may also be described and claimed.

Abstract: Aspects of the disclosure provide a method for video frame rotation. The method includes receiving a first tile from among a plurality of tiles forming a video frame. The first tile includes a first plurality of macro pixels where each macro pixel interleaves at least one pair of neighboring pixels in a first orientation. Further, the method includes de-interleaving the first plurality of macro pixels into first pixels, mapping the first pixels into first rotated neighboring pixels in a second orientation, and interleaving the first rotated neighboring pixels into first rotated macro pixels forming a first rotated tile.

Abstract: A method for operating a host device includes comparing a predetermined response of a peripheral device to a response token received from the peripheral device. The predetermined response and the response token are generated based on a first command transmitted from the host device to the peripheral device. The method further includes controlling a transfer of first data from a first memory to a peripheral control module based on the comparison between the predetermined response and the response token without interrupting a host control module, and selectively passing interrupts to the host control module when the predetermined response does not match the response token.

Abstract: A system including a processing core configured to generate a request signal to transfer data between a host device and a peripheral device. The processing core is in a low power state subsequent to generating the request signal. An interface module, separate from the processing core, is configured to transmit a sequence of commands from the host device to the peripheral device based on the request signal. The sequence of commands is transmitted to initiate the transfer of the data between the host device and the peripheral device. A comparator configured to compare expected responses of the peripheral device to the sequence of commands against responses received from the peripheral device to control the transfer of the data between the host device and the peripheral device without waking up the processing core from the low power state.

Abstract: Aspects of the disclosure provide a method for video frame rotation. The method includes receiving a first tile from among a plurality of tiles forming a video frame. The first tile includes a first plurality of macro pixels where each macro pixel interleaves at least one pair of neighboring pixels in a first orientation. Further, the method includes de-interleaving the first plurality of macro pixels into first pixels, mapping the first pixels into first rotated neighboring pixels in a second orientation, and interleaving the first rotated neighboring pixels into first rotated macro pixels forming a first rotated tile.

Abstract: A method for operating a host device includes comparing a predetermined response of a peripheral device to a response token received from the peripheral device. The predetermined response and the response token are generated based on a first command transmitted from the host device to the peripheral device. The method further includes controlling a transfer of first data from a first memory to a peripheral control module based on the comparison between the predetermined response and the response token without interrupting a host control module, and selectively passing interrupts to the host control module when the predetermined response does not match the response token.

Abstract: To save power, a controller formats data packets for transmission to a remote device and then enters a low power mode. A direct memory access unit reads the formatted data packets and presents them to a communication interface for transmission to the remote device. A hardware logic unit matches acknowledgement and no-acknowledgement responses from the remote device for directing further packet transmission. When the hardware logic unit cannot match a response from the remote device it signals the controller to wake up for further processing.

Abstract: A host device includes a peripheral control module that includes a first memory register that receives data from a first memory and a direct memory access (DMA) module that communicates with the first memory. The host device also includes a host control module that receives data from the first memory. The host device also includes a DMA control module that communicates with the first memory register, the host control module and a second memory that includes a first memory array. The DMA control module compares contents of the first memory array to contents of the memory register and controls transfers of data from the first memory to the peripheral control module based on the comparison.

Abstract: A system includes first memory for storing data and a processing core for executing software instructions on the data that is received from the first memory. The system also includes a peripheral device configured to communicate with the processing core through a peripheral control module. The peripheral control module, also referred to as a peripheral control device, includes second memory. The peripheral control module also includes a comparator for governing data transfer transactions, without interrupting the processing core, based on a comparison. The comparator therefore compares expected responses to command sequences and received responses to the command sequences. The command sequences and responses to command sequences are associated with data packets to be exchanged between the first memory and the peripheral device.

Abstract: Embodiments of the present disclosure provide a method comprising providing 2-D or 3-D graphics content to a graphics processing module; processing the graphics content to generate a stream of images (e.g., three dimensional images and/or two dimensional images) for display, the stream having a frame rate; and governing a rate of processing the graphics content to limit the frame rate of the generated stream of images to be less than or equal to a frame rate threshold. Other embodiments may also be described and claimed.

Abstract: A host device includes a peripheral control module that includes a first memory register that receives data from a first memory and a direct memory access (DMA) module that communicates with the first memory. The host device also includes a host control module that receives data from the first memory. The host device also includes a DMA control module that communicates with the first memory register, the host control module and a second memory that includes a first memory array. The DMA control module compares contents of the first memory array to contents of the memory register and controls transfers of data from the first memory to the peripheral control module based on the comparison.

Abstract: To save power, a controller formats data packets for transmission to a remote device and then enters a low power mode. A direct memory access unit reads the formatted data packets and presents them to a communication interface for transmission to the remote device. A hardware logic unit matches acknowledgement and no-acknowledgement responses from the remote device for directing further packet transmission. When the hardware logic unit cannot match a response from the remote device it signals the controller to wake up for further processing.

Abstract: A host device includes a peripheral control module that includes a first memory register that receives data from a first memory and a direct memory access (DMA) module that communicates with the first memory. The host device also includes a host control module that receives data from the first memory. The host device also includes a DMA control module that communicates with the first memory register, the host control module and a second memory that includes a first memory array. The DMA control module compares contents of the first memory array to contents of the memory register and controls transfers of data from the first memory to the peripheral control module based on the comparison.

Abstract: A traffic control application programming interface for abstracting the use of traffic control components to client applications to provide quality of service. The traffic control interface accepts input from a client application and based on that input, communicates with the operating system to control kernel level traffic control components. The client can register with the traffic control interface, and it can open and close interfaces, add, modify, and delete flows on those interfaces, and attach or delete filters on the flows. The client can also obtain data on any currently active interface, flow, or filter. The traffic control interface will send the appropriate message to the operating system, directing that the necessary tasks be performed by either a packet scheduler or a packet classifier. Those kernel level components then return through the operating system the results of the operations requested, and that return data will be passed back to the client application.

Abstract: A traffic control application programming interface for abstracting the use of traffic control components to client applications to provide quality of service. The traffic control interface accepts input from a client application and based on that input, communicates with the operating system to control kernel level traffic control components. The client can register with the traffic control interface, and it can open and close interfaces, add, modify, and delete flows on those interfaces, and attach or delete filters on the flows. The client can also obtain data on any currently active interface, flow, or filter. The traffic control interface will send the appropriate message to the operating system, directing that the necessary tasks be performed by either a packet scheduler or a packet classifier. Those kernel level components then return through the operating system the results of the operations requested, and that return data will be passed back to the client application.

Abstract: A traffic control application programming interface for abstracting the use of traffic control components to client applications to provide quality of service. The traffic control interface accepts input from a client application and based on that input, communicates with the operating system to control kernel level traffic control components. The client can register with the traffic control interface, and it can open and close interfaces, add, modify, and delete flows on those interfaces, and attach or delete filters on the flows. The client can also obtain data on any currently active interface, flow, or filter. The traffic control interface will send the appropriate message to the operating system, directing that the necessary tasks be performed by either a packet scheduler or a packet classifier. Those kernel level components then return through the operating system the results of the operations requested, and that return data will be passed back to the client application.

Abstract: An object identification method for wireless portable devices for a user equipped with a portable wireless imaging device to be able to obtain information and services related to imaged objects, where the object identification is performed at least partially by a remote computational facility, and where the object identification is based on acquired images of the object.