Patents by Inventor Offer Levy

Offer Levy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9396056
    Abstract: In some disclosed embodiments instruction execution logic provides conditional memory fault assist suppression. Some embodiments of processors comprise a decode stage to decode one or more instruction specifying: a set of memory operations, one or more register, and one or more memory address. One or more execution units, responsive to the one or more decoded instruction, generate said one or more memory address for the set of memory operations. Instruction execution logic records one or more fault suppress bits to indicate whether one or more portion of the set of memory operations are masked. Fault generation logic is suppressed from considering a memory fault corresponding to a faulting one of the set of memory operations when said faulting one of the set of memory operations corresponds to a portion of the set of memory operations that is indicated as masked by said one or more fault suppress bits.
    Type: Grant
    Filed: March 15, 2014
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventors: Zeev Sperber, Robert Valentine, Offer Levy, Michael Mishaeli, Gal Ofir
  • Patent number: 9248232
    Abstract: Embodiments of the present disclosure are directed to a skin adherable device for delivering therapeutic fluid into a body of a patient. In some embodiments, the device includes a monitoring apparatus, a pump, and a tip for delivering the therapeutic fluid into the body of the patient and for monitoring bodily analyte in the body of the patient. The pump may continuously deliver the therapeutic fluid to the body of the patient and the monitoring apparatus may continuously monitor bodily analytes of the patient.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: February 2, 2016
    Assignee: Roche Diabetes Care, Inc.
    Inventors: Ofer Yodfat, Eli Znati, Illai Gescheit, Avraham Neta, Offer Levy
  • Publication number: 20150261590
    Abstract: In some disclosed embodiments instruction execution logic provides conditional memory fault assist suppression. Some embodiments of processors comprise a decode stage to decode one or more instruction specifying: a set of memory operations, one or more register, and one or more memory address. One or more execution units, responsive to the one or more decoded instruction, generate said one or more memory address for the set of memory operations. Instruction execution logic records one or more fault suppress bits to indicate whether one or more portion of the set of memory operations are masked. Fault generation logic is suppressed from considering a memory fault corresponding to a faulting one of the set of memory operations when said faulting one of the set of memory operations corresponds to a portion of the set of memory operations that is indicated as masked by said one or more fault suppress bits.
    Type: Application
    Filed: March 15, 2014
    Publication date: September 17, 2015
    Inventors: Zeev Sperber, Robert Valentine, Offer Levy, Michael Mishaeli, Gal Ofir
  • Publication number: 20120277667
    Abstract: Embodiments of the present disclosure are directed to a skin adherable device for delivering therapeutic fluid into a body of a patient. In some embodiments, the device includes a monitoring apparatus, a pump, and a tip for delivering the therapeutic fluid into the body of the patient and for monitoring bodily analyte in the body of the patient. The pump may continuously deliver the therapeutic fluid to the body of the patient and the monitoring apparatus may continuously monitor bodily analytes of the patient.
    Type: Application
    Filed: November 30, 2010
    Publication date: November 1, 2012
    Applicant: MEDINGO LTD
    Inventors: Ofer Yodat, Eli Znati, Illai Gescheit, Avraham Neta, Offer Levy