Patents by Inventor Ofir Sadeh

Ofir Sadeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12375199
    Abstract: In one embodiment, a processing system includes an interface controller to receive a data signal from a remote link partner over a link, and recover a clock signal from the received data signal, frequency generation circuitry to receive the recovered clock signal, and output a local clock signal responsively to the received recovered clock signal, wherein the interface controller is configured to drive a transmit symbol rate responsively to the local clock signal, and a digital control loop including the interface controller and the frequency generation circuitry, wherein the interface controller is configured to identify a clock drift, generate a digital control signal responsively to the clock drift, and send the digital control signal to the frequency generation circuitry, which is configured to adjust a frequency of the local clock signal responsively to the digital control signal in order to reduce the clock drift.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: July 29, 2025
    Assignee: Mellanox Technologies, Ltd
    Inventors: Natan Manevich, Dotan David Levi, Maciek Machnikowski, Wojciech Wasko, Bar Shapira, Jonathan Oliel, Ofir Sadeh
  • Patent number: 12289389
    Abstract: In one embodiment, a system includes a digitally controlled oscillator (DCO) to generate a local clock having a local clock frequency, and clock synchronization circuitry to receive from a device a signal indicative of a remote clock frequency, compare measures of the remote clock frequency and the local clock frequency; generate a digital control command based on the comparison; and provide the digital control command to the DCO, wherein the DCO is to adjust the local clock frequency responsively to the digital control command.
    Type: Grant
    Filed: August 13, 2023
    Date of Patent: April 29, 2025
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Natan Manevich, Dotan David Levi, Arnon Sattinger, Wojciech Waśko, Maciej Machnikowski, Doron Fael, Ofir Sadeh, Jonathan Oliel
  • Publication number: 20250105938
    Abstract: In one embodiment, a monitoring device includes an interface to receive symbols from at least one monitored device over at least one communication link, at least one counter to track a number of the symbols received from the at least one monitored device over the at least one communication link, and processing circuitry to monitor synchronization of at least one clock of the at least one monitored device based on at least one value of the at least one counter.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Inventors: Natan Manevich, Dotan David Levi, Maciej Machnikowski, Wojciech Wasko, Elran Abissror, Bar Or Shapira, Pavel Efros, Jonathan Oliel, Ofir Sadeh
  • Publication number: 20250055668
    Abstract: In one embodiment, a system includes a digitally controlled oscillator (DCO) to generate a local clock having a local clock frequency, and clock synchronization circuitry to receive from a device a signal indicative of a remote clock frequency, compare measures of the remote clock frequency and the local clock frequency; generate a digital control command based on the comparison; and provide the digital control command to the DCO, wherein the DCO is to adjust the local clock frequency responsively to the digital control command.
    Type: Application
    Filed: August 13, 2023
    Publication date: February 13, 2025
    Inventors: Natan Manevich, Dotan David Levi, Arnon Sattinger, Wojciech Wasko, Maciej Machnikowski, Doron Fael, Ofir Sadeh, Jonathan Oliel
  • Publication number: 20240204897
    Abstract: In one embodiment, a processing system includes an interface controller to receive a data signal from a remote link partner over a link, and recover a clock signal from the received data signal, frequency generation circuitry to receive the recovered clock signal, and output a local clock signal responsively to the received recovered clock signal, wherein the interface controller is configured to drive a transmit symbol rate responsively to the local clock signal, and a digital control loop including the interface controller and the frequency generation circuitry, wherein the interface controller is configured to identify a clock drift, generate a digital control signal responsively to the clock drift, and send the digital control signal to the frequency generation circuitry, which is configured to adjust a frequency of the local clock signal responsively to the digital control signal in order to reduce the clock drift.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 20, 2024
    Inventors: Natan Manevich, Dotan David Levi, Maciek Machnikowski, Wojciech Wasko, Bar Shapira, Jonathan Oliel, Ofir Sadeh