Patents by Inventor Ofir Suranyi

Ofir Suranyi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170348
    Abstract: A method of testing semiconductor wafers includes receiving a wafer bin map for a semiconductor wafer, wherein the wafer bin map includes a plurality of points corresponding to a plurality of defective dies fabricated on the semiconductor wafer, identifying a cluster of points in the wafer bin map from the plurality of points, and generating a filtered bin map using the cluster of points. The method also includes extracting a set of features for the filtered bin map, wherein the set of features comprises a set of global features common to the semiconductor wafer and a set of cluster features specific to the filtered bin map, executing a trained machine learning model using the set of features as inputs to generate a pattern classification, and determining, based on the pattern classification, that the semiconductor wafer includes a pattern of defective dies caused by a defective manufacturing process.
    Type: Application
    Filed: November 20, 2023
    Publication date: May 23, 2024
    Applicant: Optimal Plus Ltd.
    Inventors: Ofir Suranyi, Miriam Horovicz, Alberto Alexis Jeno