Patents by Inventor Oh-Hyun KIM

Oh-Hyun KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11676820
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: June 13, 2023
    Assignee: SK hynix Inc.
    Inventors: Oh-Hyun Kim, Sung-Hwan Ahn, Hae-Jung Park, Tae-Hang Ahn
  • Publication number: 20200402804
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Application
    Filed: September 4, 2020
    Publication date: December 24, 2020
    Inventors: Oh-Hyun KIM, Sung-Hwan AHN, Hae-Jung PARK, Tae-Hang AHN
  • Patent number: 10790150
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: September 29, 2020
    Assignee: SK hynix Inc.
    Inventors: Oh-Hyun Kim, Sung-Hwan Ahn, Hae-Jung Park, Tae-Hang Ahn
  • Publication number: 20200083055
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Inventors: Oh-Hyun KIM, Sung-Hwan AHN, Hae-Jung PARK, Tae-Hang AHN
  • Patent number: 10522362
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventors: Oh-Hyun Kim, Sung-Hwan Ahn, Hae-Jung Park, Tae-Hang Ahn
  • Patent number: 10186597
    Abstract: A method for fabricating a semiconductor device includes: forming a semiconductor structure including a pattern; forming an epitaxial layer having a first dopant concentration in the pattern; forming in-situ an interface layer having a second dopant concentration higher than the first dopant concentration, over the epitaxial layer; forming a metal silicide layer over the interface layer; and forming a metal plug over the metal silicide layer.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: January 22, 2019
    Assignee: SK Hynix Inc.
    Inventors: Tae-Hang Ahn, Oh-Hyun Kim, Seung-Beom Baek
  • Publication number: 20180350611
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
    Type: Application
    Filed: December 11, 2017
    Publication date: December 6, 2018
    Inventors: Oh-Hyun KIM, Sung-Hwan AHN, Hae-Jung PARK, Tae-Hang AHN
  • Publication number: 20180182861
    Abstract: A method for fabricating a semiconductor device includes: forming a semiconductor structure including a pattern; forming an epitaxial layer having a first dopant concentration in the pattern; forming in-situ an interface layer having a second dopant concentration higher than the first dopant concentration, over the epitaxial layer; forming a metal silicide layer over the interface layer; and forming a metal plug over the metal silicide layer.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 28, 2018
    Inventors: Tae-Hang AHN, Oh-Hyun KIM, Seung-Beom BAEK
  • Patent number: 9929249
    Abstract: A method for fabricating a semiconductor device includes: forming a semiconductor structure including a pattern; forming an epitaxial layer having a first dopant concentration in the pattern; forming in-situ an interface layer having a second dopant concentration higher than the first dopant concentration, over the epitaxial layer; forming a metal silicide layer over the interface layer; and forming a metal plug over the metal silicide layer.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: March 27, 2018
    Assignee: SK Hynix Inc.
    Inventors: Tae-Hang Ahn, Oh-Hyun Kim, Seung-Beom Baek
  • Patent number: 9831344
    Abstract: A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: November 28, 2017
    Assignee: SK Hynix Inc.
    Inventors: Oh-Hyun Kim, Seung-Beom Baek, Tae-Hang Ahn
  • Publication number: 20170186870
    Abstract: A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 29, 2017
    Inventors: Oh-Hyun KIM, Seung-Beom BAEK, Tae-Hang AHN
  • Patent number: 9614084
    Abstract: A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: April 4, 2017
    Assignee: SK Hynix Inc.
    Inventors: Oh-Hyun Kim, Seung-Beom Baek, Tae-Hang Ahn
  • Patent number: 9380510
    Abstract: A system for processing General Packet Radio Service (GPRS) Tunneling Protocol (GTP) for a handover in a mobile communication system is provided. The system includes an Evolved Packet Core (EPC), a source base station, and a target base station. The EPC transmits an end data indication message to a source base station of a user terminal to inform of an update for a user plane when receiving an update request message for the user plane of the user terminal from the target base station. The source base station forwards the remaining data destined for the user terminal to the target base station when receiving the end data indication message from the EPC, and transmits the end data indication message to the target base station upon completion of the forwarding.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: June 28, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Oh-Hyun Kim
  • Publication number: 20100189076
    Abstract: A system for processing General Packet Radio Service (GPRS) Tunneling Protocol (GTP) for a handover in a mobile communication system is provided. The system includes an Evolved Packet Core (EPC), a source base station, and a target base station. The EPC transmits an end data indication message to a source base station of a user terminal to inform of an update for a user plane when receiving an update request message for the user plane of the user terminal from the target base station. The source base station forwards the remaining data destined for the user terminal to the target base station when receiving the end data indication message from the EPC, and transmits the end data indication message to the target base station upon completion of the forwarding.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 29, 2010
    Applicant: Samsung Electronics Co. Ltd.
    Inventor: Oh-Hyun KIM