Patents by Inventor Ohjoon Kwon

Ohjoon Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230206298
    Abstract: A method and electronic device for recognizing a product are provided. The method includes obtaining first feature information and second feature information from an image related to a product, obtaining fusion feature information based on the first feature information and the second feature information by using a main encoder model that reflects a correlation between feature information of different modalities, matching the fusion feature information against a database of the product, and providing information about the product, based on a result of the matching.
    Type: Application
    Filed: December 30, 2022
    Publication date: June 29, 2023
    Inventors: Kyungsu KIM, Ohjoon KWON, Younguk KIM, Hyunsoo CHOI, Yehoon KIM, Hyunhan KIM, Hyosang KIM, Hyungmin LEE
  • Publication number: 20230206665
    Abstract: A method and an electronic device for recognizing text are provided. The method includes detecting positions of pieces of text included in the text in the image, generating cropped images by cropping areas corresponding to the pieces of text in the image, recognizing characters of the pieces of text based on the cropped images, generating a sentence by inputting the positions of the pieces of text and the characters of the pieces of text to a multimodal language model, wherein the multimodal language model is an artificial intelligence (AI) model for inferring an original sentence of the text, and displaying the sentence.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 29, 2023
    Inventors: Younguk KIM, Kyungsu KIM, Ohjoon KWON, Yehoon KIM, Hyunhan KIM, Hyosang KIM, Hyungmin LEE
  • Patent number: 10289600
    Abstract: A method for error detection in transmissions on a multi-wire interface includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface. Selecting one of the plurality of launch clock signals may include selecting a first launch clock signal when the transition in signaling state terminates at an undriven state, and selecting a second launch clock signal when the transition in signaling state begins at an undriven state. An edge in the first launch clock signal may occur before a corresponding edge in the second launch clock signal.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: May 14, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Dhaval Sejpal, Shih-Wei Chou, Chulkyu Lee, Ohjoon Kwon, George Alan Wiley
  • Patent number: 10049067
    Abstract: An on-chip passive transmission channel is provided for the propagation of serialized data from a first controller to a dual-protocol physical layer interface. A second controller for the dual-protocol physical layer interface is located closer on a semiconductor die to the dual-protocol physical layer interface than the first controller.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: August 14, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Xiaohua Kong, Deqiang Song, Zhi Zhu, Ohjoon Kwon
  • Publication number: 20180157609
    Abstract: An on-chip passive transmission channel is provided for the propagation of serialized data from a first controller to a dual-protocol physical layer interface. A second controller for the dual-protocol physical layer interface is located closer on a semiconductor die to the dual-protocol physical layer interface than the first controller.
    Type: Application
    Filed: December 1, 2016
    Publication date: June 7, 2018
    Inventors: Xiaohua Kong, Deqiang Song, Zhi Zhu, Ohjoon Kwon
  • Patent number: 9621333
    Abstract: Systems, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Two Integrated Circuit (IC) devices may be collocated in an electronic apparatus and communicatively coupled through a 3-wire, 3-phase interface. A data transfer method operational on a first of the two or more devices includes determining presence of a misalignment of the 3-wire communication link involving two or more wires, and inverting a first bit of a 3-bit symbol encoded in a transition of signaling state of the 3-wire communication link when the misalignment of the 3-wire communication link is determined to affect phase relationships between two or more signals carried on the three wires, such that inverting the first bit corrects the phase relationships between the two or more signals. A version of the 3-phase signal may be communicated in a different phase state through each of three wires.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: April 11, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: George Alan Wiley, Ohjoon Kwon
  • Publication number: 20170039163
    Abstract: Apparatus, systems and methods for error detection in transmissions on a multi-wire interface are disclosed. One method includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface. Selecting one of the plurality of launch clock signals may include selecting a first launch clock signal when the transition in signaling state terminates at an undriven state, and selecting a second launch clock signal when the transition in signaling state begins at an undriven state. An edge in the first launch clock signal may occur before a corresponding edge in the second launch clock signal.
    Type: Application
    Filed: October 24, 2016
    Publication date: February 9, 2017
    Inventors: Dhaval Sejpal, Shih-Wei Chou, Chulkyu Lee, Ohjoon Kwon, George Alan Wiley
  • Publication number: 20170041130
    Abstract: Systems, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Two Integrated Circuit (IC) devices may be collocated in an electronic apparatus and communicatively coupled through a 3-wire, 3-phase interface. A data transfer method operational on a first of the two or more devices includes determining presence of a misalignment of the 3-wire communication link involving two or more wires, and inverting a first bit of a 3-bit symbol encoded in a transition of signaling state of the 3-wire communication link when the misalignment of the 3-wire communication link is determined to affect phase relationships between two or more signals carried on the three wires, such that inverting the first bit corrects the phase relationships between the two or more signals. A version of the 3-phase signal may be communicated in a different phase state through each of three wires.
    Type: Application
    Filed: September 20, 2016
    Publication date: February 9, 2017
    Inventors: George Alan Wiley, Ohjoon Kwon
  • Patent number: 9520988
    Abstract: Systems, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Two Integrated Circuit (IC) devices may be collocated in an electronic apparatus and communicatively coupled through a 3-wire, 3-phase interface. A data transfer method operational on a first of the two or more devices includes determining presence of a misalignment of the 3-wire communication link involving two or more wires, and inverting a first bit of a 3-bit symbol encoded in a transition of signaling state of the 3-wire communication link when the misalignment of the 3-wire communication link is determined to affect phase relationships between two or more signals carried on the three wires, such that inverting the first bit corrects the phase relationships between the two or more signals. A version of the 3-phase signal may be communicated in a different phase state through each of three wires.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: December 13, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: George Alan Wiley, Ohjoon Kwon
  • Patent number: 9496879
    Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method of data communication includes configuring a clock recovery circuit to provide a first clock signal that includes a pulse for each symbol transmitted on the interface, where symbols are transmitted on the interface at a first frequency, adjusting a loop delay of the clock recovery circuit to modify the first clock to have a second frequency that is no more than half the first frequency, where the clock recovery circuit generates a pulse in the first clock signal for a first of an integer number of symbols and suppresses pulse generation for other symbols in the integer number of symbols, configuring a clock generation circuit to provide a second clock signal, and capturing symbols from the interface using the first clock signal and the second clock signal.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: November 15, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Ying Duan, Chulkyu Lee, Shih-Wei Chou, Harry Dang, Ohjoon Kwon
  • Patent number: 9485080
    Abstract: Methods, apparatus, and systems for clock calibration are disclosed. A method for clock data recovery circuit calibration includes configuring a first clock recovery circuit to provide a clock signal that has a first frequency and that includes a single pulse for each symbol transmitted on a 3-wire, 3-phase interface, and calibrating the first clock recovery circuit by incrementally increasing a delay period provided by a delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that is less than the first frequency and, when the first clock recovery circuit has a frequency that is less than the first frequency, incrementally decreasing the delay period provided by the delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that matches the first frequency.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: November 1, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Ying Duan, Chulkyu Lee, Harry Dang, Ohjoon Kwon
  • Publication number: 20160065235
    Abstract: An integrated circuit includes a first circuit configured to convert a digital signal of a first format, which includes a sampled version of an analog signal, to a digital signal of a second format. A second circuit is configured to output the digital signal of the second format through a digital interface. An electronic system including a circuit configured to output a digital signal of the analog signal as a bitstream is provided. A clock generator generates a clock for clocking the bitstream. In another aspect, a method for operating an integrated circuit includes converting a digital signal of a first format, which includes a sampled version of an analog signal, to a digital signal of a second format. The digital signal of the second format is outputted through a digital interface. A monitoring or observing device receives directly the digital signal of the second format through the digital interface.
    Type: Application
    Filed: September 3, 2014
    Publication date: March 3, 2016
    Inventors: Xiaohua KONG, Thuan LY, Behnam AMELIFARD, Ohjoon KWON
  • Publication number: 20130176273
    Abstract: A method for touch detection in a touch panel display includes entering a low power touch detection mode and intermittently stimulating the touch panel display with signals to determine if any touch event occurs without locating the touch event on the touch panel. If a touch event is detected, a full scan mode is entered to locate the touch event on the touch panel. This provides both faster touch detection and lower power operation for the touch panel display and controller circuit.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 11, 2013
    Applicant: Broadcom Corporation
    Inventors: Tianhao Li, Sumant Ranganathan, David Amory Sobel, John S. Walley, Satish Vithal Joshi, Kerrynn Jacques de Roche, Ohjoon Kwon
  • Patent number: 6193819
    Abstract: A method for manufacturing a cold rolled steel sheet for use in a shadow mask is disclosed, in which without adding an expensive alloy element, a short intermediate decarburization annealing is carried out, and despite this fact, a forming defect does not occur after the forthcoming stacked annealing. The method includes the steps of preparing a steel composed of, in weight %, 0.003% or less of C, 0.10-0.20% of Mn, 0.01-0.05% of Al, 0.004% or less of N, and a balance of Fe and other unavoidable impurities. A hot rolling is carried out on the steel at a temperature of above 910° C., and then, a first cold rolling is carried out to form a first cold rolled steel sheet. Then a decarburization is carried out on the first cold rolled steel sheet down to a carbon content of 0.0015% to form a decarburized steel sheet, and then a second cold rolling with a reduction ratio of more than 35% is carried out on the decarburized steel sheet.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: February 27, 2001
    Assignee: Pohang Iron & Steel Co., Ltd.
    Inventors: Gyosung Kim, Hyun-Gyu Hwang, Eel-Young Kim, Joung-Hoon Cheoi, Jong-Ho Kim, Young-Mo Kim, Ohjoon Kwon, Ki-Ho Kim