Patents by Inventor Oh-kyunm Kwon

Oh-kyunm Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8664726
    Abstract: An electrostatic discharge (ESD) device includes a substrate, an external well of a first conductivity type in the substrate, and an internal well of a second conductivity type in the external well, the first conductivity type opposite the second conductivity type. The ESD device further includes a first heavily doped region of the first conductivity type located at a surface of the internal well, a second heavily doped region of the second conductivity type located at a surface of the internal well, and a third heavily doped region of the first conductivity type located at a surface of the external well. The second heavily doped region is interposed between and spaced from each of the first and third heavily doped regions, and at least one of a space between the first and second heavily doped regions and a space between the second and third heavily doped regions is devoid of a device isolation structure of electrical isolation material.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: March 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-ryul Chang, Oh-kyunm Kwon
  • Publication number: 20120043643
    Abstract: An electrostatic discharge (EDS) device includes a substrate, an external well of a first conductivity type in the substrate, and an internal well of a second conductivity type in the external well, the first conductivity type opposite the second conductivity type. The EDS device further includes a first heavily doped region of the first conductivity type located at a surface of the internal well, a second heavily doped region of the second conductivity type located at a surface of the internal well, and a third heavily doped region of the first conductivity type located at a surface of the external well. The second heavily doped region is interposed between and spaced from each of the first and third heavily doped regions, and at least one of a space between the first and second heavily doped regions and a space between the second and third heavily doped regions is devoid of a device isolation structure of electrical isolation material.
    Type: Application
    Filed: March 7, 2011
    Publication date: February 23, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-ryul Chang, Oh-kyunm Kwon