Patents by Inventor Olaf Heitzsch

Olaf Heitzsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11276624
    Abstract: A semiconductor device includes: a semiconductor substrate; a power device formed in the semiconductor substrate; a metal bilayer formed over the semiconductor substrate, the metal bilayer including a discontinuous metal layer formed on and in contact with a continuous base metal layer; and one or more contact pads formed in the metal bilayer or in a metallization layer above the metal bilayer. The discontinuous metal layer includes a plurality of metal blocks which are laterally spaced apart from one another and which form a heat sink structure over the power device. The continuous base metal layer is configured to laterally spread heat energy from the power device to the plurality of metal blocks. Methods of producing the semiconductor device are also described.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: March 15, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Michael Nelhiebel, Heiko Assmann, Olaf Heitzsch, Jakob Kriz, Sven Lanzerstorfer, Rainer Pelzer, Werner Robl, Bernhard Weidgans, Johannes Zechner
  • Publication number: 20210183732
    Abstract: A semiconductor device includes: a semiconductor substrate; a power device formed in the semiconductor substrate; a metal bilayer formed over the semiconductor substrate, the metal bilayer including a discontinuous metal layer formed on and in contact with a continuous base metal layer; and one or more contact pads formed in the metal bilayer or in a metallization layer above the metal bilayer. The discontinuous metal layer includes a plurality of metal blocks which are laterally spaced apart from one another and which form a heat sink structure over the power device. The continuous base metal layer is configured to laterally spread heat energy from the power device to the plurality of metal blocks. Methods of producing the semiconductor device are also described.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 17, 2021
    Inventors: Michael Nelhiebel, Heiko Assmann, Olaf Heitzsch, Jakob Kriz, Sven Lanzerstorfer, Rainer Pelzer, Werner Robl, Bernhard Weidgans, Johannes Zechner
  • Patent number: 8901737
    Abstract: An integrated circuit arrangement is disclosed having a wiring indentation and an auxiliary indentation in a dielectric layer. The wiring indentation contains a metal through which current flows during operation of the circuit arrangement. The auxiliary indentation contains a metal through which an electric current does not flow during operation of the circuit arrangement. The auxiliary indentation serves as an alignment mark during the production of the integrated circuit arrangement.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: December 2, 2014
    Assignee: Infineon Technologies AG
    Inventors: Klaus Goller, Olaf Heitzsch, Marion Nichterwitz
  • Publication number: 20100320613
    Abstract: An integrated circuit arrangement is disclosed having a wiring indentation and an auxiliary indentation in a dielectric layer. The wiring indentation contains a metal through which current flows during operation of the circuit arrangement. The auxiliary indentation contains a metal through which an electric current does not flow during operation of the circuit arrangement. The auxiliary indentation serves as an alignment mark during the production of the integrated circuit arrangement.
    Type: Application
    Filed: August 11, 2010
    Publication date: December 23, 2010
    Inventors: Klaus Goller, Olaf Heitzsch, Marion Nichterwitz
  • Patent number: 7795105
    Abstract: A method is disclosed for producing an integrated circuit arrangement with an auxiliary indentation, particularly with aligning marks, and an integrated circuit arrangement. The invention also relates to a method for producing aligning marks. During the method, a planarization is carried out before material is removed from an auxiliary indentation.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: September 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Klaus Goller, Olaf Heitzsch, Marion Nichterwitz
  • Publication number: 20070102819
    Abstract: A method is disclosed for producing an integrated circuit arrangement with an auxiliary indentation, particularly with aligning marks, and an integrated circuit arrangement. The invention also relates to a method for producing aligning marks. During the method, a planarization is carried out before material is removed from an auxiliary indentation.
    Type: Application
    Filed: September 25, 2006
    Publication date: May 10, 2007
    Inventors: Klaus Goller, Olaf Heitzsch, Marion Nichterwitz
  • Patent number: 6645812
    Abstract: A method for producing a non-volatile semiconductor memory cell with a separate tunnel window cell includes the step of forming a tunnel zone in a late implantation step by performing a tunnel implantation with the aid of a tunnel window cell as a mask. The resulting memory cell has a small area requirement and a high number of program/clear cycles.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: November 11, 2003
    Assignee: Infineon Technologies AG
    Inventors: Peter Wawer, Oliver Springmann, Konrad Wolf, Olaf Heitzsch, Kai Huckels, Reinhold Rennekamp, Mayk Röhrich, Elard Stein Von Kamienski, Christoph Kutter, Christoph Ludwig
  • Patent number: 6459296
    Abstract: The electrical characteristic of a microelectronic circuit configuration that has at least one analog electronic unit is set. In a configuration step, by feeding and/or extracting electrical charge, the analog electronic unit is put into a state which permanently determines the analog electrical characteristics of the unit. In particular, the floating gate of an EEPROM cell is charged up to a freely selectable charge value lying within a continuous range.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: October 1, 2002
    Assignee: Infineon Technologies AG
    Inventors: Stephan Bradl, Oliver Gehring, Olaf Heitzsch
  • Patent number: 6447372
    Abstract: The polishing agent of the invention has polishing grains suspended in a solution. The polishing grains consist essentially of a first substance with a glass transition temperature TG, and the polishing grains contain a dopant. The concentration of the dopant is set so that the glass transition temperature TG′ of the doped substance is lower than the glass transition temperature TG of the undoped first substance. The polishing agent is advantageously used for the microscratch-free planarization of a semiconductor substrate or of layers applied on it.
    Type: Grant
    Filed: January 25, 2000
    Date of Patent: September 10, 2002
    Assignee: Infineon Technologies AG
    Inventors: Stephan Bradl, Olaf Heitzsch
  • Publication number: 20020119626
    Abstract: A method for producing a non-volatile semiconductor memory cell with a separate tunnel window cell includes the step of forming a tunnel zone in a late implantation step by performing a tunnel implantation with the aid of a tunnel window cell as a mask. The resulting memory cell has a small area requirement and a high number of program/clear cycles.
    Type: Application
    Filed: December 28, 2001
    Publication date: August 29, 2002
    Inventors: Peter Wawer, Oliver Springmann, Konrad Wolf, Olaf Heitzsch, Kai Huckels, Reinhold Rennekamp, Mayk Rohrich, Elard Stein Von Kamienski, Christoph Kutter, Christoph Ludwig
  • Publication number: 20020072301
    Abstract: A method and an apparatus for detecting the presence of a work piece in an automatic processing apparatus are described. Previously known detection devices cannot make a clear distinction between the presence and absence of the work piece under all conditions. An apparatus is therefore provided which contains an ultrasound transmitter, an ultrasound receiver and a detection device (controller). The detection as to whether a work piece is held in a holder in the processing apparatus is carried out by irradiating the holder with ultrasound waves, receiving the reflected ultrasound waves and detecting on the basis of the reflected ultrasound waves. The method can be used advantageously in particular in polishing machines for wafers, where the polishing cloth is distinguished considerably, in terms of its acoustic reflection capacity, from the wafer to be polished.
    Type: Application
    Filed: September 24, 2001
    Publication date: June 13, 2002
    Inventors: Stephan Bradl, Olaf Heitzsch
  • Publication number: 20020011869
    Abstract: The electrical characteristics of a microelectronic circuit configuration that has at least one analog electronic unit is set. In a configuration step, by feeding and/or extracting electrical charge, the analog electronic unit is put into a state which permanently determines the analog electrical characteristics of the unit. In particular, the floating gate of an EEPROM cell is charged up to a freely selectable charge value lying within a continuous range.
    Type: Application
    Filed: July 26, 2001
    Publication date: January 31, 2002
    Inventors: Stephan Bradl, Oliver Gehring, Olaf Heitzsch
  • Patent number: 6337255
    Abstract: A method for forming a trench structure in a silicon substrate, which trench structure serves for electrically insulating a first region of the substrate from a second substrate region. The method proceeds from a growth of a thermal oxide layer on the substrate surface and an application and patterning of a mask layer over the thermal oxide layer. A trench of predetermined depth is subsequently etched into the silicon substrate through the patterned mask layer. The trench is filled by a deposition of a conformal covering oxide layer on the substrate with an essentially uniform thickness that is sufficient for completely filling the trench. Afterwards, a polysilicon layer is deposited on the covering oxide layer and a chemical mechanical planarization method is carried out with high selectivity S between the polysilicon material and the oxide material in order to obtain a flat surface.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: January 8, 2002
    Assignee: Infineon Technologies AG
    Inventors: Stephan Bradl, Olaf Heitzsch, Michael Schmidt
  • Patent number: 6014218
    Abstract: A device for end-point monitoring used in the polishing of components, in particular semiconductor components. The device has a textile structure, which may be constructed as a cloth or a pad, and is used to accommodate a component that is to be monitored. The textile-like structure has a windowless construction. The textile structure may be disposed on a platen. Furthermore, a light source, preferably a laser, for emitting a monochromatic red light beam having a preferred wavelength of approximately 800 nm is provided. The red light beam is directed through the textile structure onto the component to be monitored. In addition, a detector is used to detect the red light beam reflected by the component to be monitored. The end-point monitoring may, for example, be carried out by interferometry. In addition, a corresponding method is also described.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: January 11, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Stephan Bradl, Olaf Heitzsch