Patents by Inventor Olaleye A. Aina
Olaleye A. Aina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170270376Abstract: In an automotive collision avoidance sensor system installed at both the fore and aft of a vehicle, there is provided an output lens, an input lens, and a transmit laser. The transmit laser is adapted to transmit a pulsed beam through the output lens to impact roadway, surrounding vehicles or objects fore, aft, port and starboard of the vehicle, with return signals from the roadway, surrounding vehicles or objects reflecting off the input lens. A sensor of the system adapted collects the return signals from the input lens to convert them into output voltages and signals, and has a data processor configured to analyze the output voltages and signals so as to calculate real-time 3-dimensional situation awareness measurements and safety metrics which are constantly measured and updated to prevent possible collision.Type: ApplicationFiled: June 6, 2017Publication date: September 21, 2017Inventor: OLALEYE A. AINA
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Patent number: 9671489Abstract: An optical detection system for detecting an incident optical signal is described. The system includes an optical package adapted to collect the incident optical signal and directed it to a detector array that is coupled thereto. The array outputs electrical signals to be analyzed by a processor. The processor is adapted to iterate algorithms using the signals to calculate an incident angle of arrival for the incident optical signal and a range of the source of the optical signal to the system based on the angle of arrival calculation. The processor is further configured to discriminate the optical signal spectrally to calculate wavelengths thereof for false alarm rejection.Type: GrantFiled: March 18, 2014Date of Patent: June 6, 2017Assignee: Epitaxial Technologies, LLCInventors: Olaleye A. Aina, Tom Pierce, Ayub M. Fathimulla
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Patent number: 7339726Abstract: A vertical cavity semiconductor optical photoamplifer (VCSOA) is used as a modulating retro-reflector (MRR) as a pixel in an array. The boundary of the cavity in the VCSOA forms a mirror for reflecting an incident light as an amplified output.Type: GrantFiled: December 9, 2004Date of Patent: March 4, 2008Assignee: Epitaxial TechnologiesInventors: Ayub Mohammed Fathimulla, Harry Stephen Hier, Olaleye A. Aina
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Publication number: 20070221827Abstract: An array of photon counting phototoreceivers is constructed as an imager with micro-digitized pixels. Each photoreactive comprises a vertical cavity optical amplifier (VCSOA) as an optical amplifier, an avalanche photodiode as detector and an analog-to-digital converter (ADC) in an integrated structure. The ADC serves as a 1-bit digitizer and uses a resonant tunneling bipolar transistor RTBT. While the preferred embodiment of the invention have been described, it will be apparent to those skilled in the art that various modifications may be made to the embodiments without departing from the spirit of the present invention. Such modifications are all within the scope of the present invention.Type: ApplicationFiled: March 21, 2006Publication date: September 27, 2007Inventors: Ayub Fathimulla, Olaleye Aina, Harry Hier
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Publication number: 20070196113Abstract: An array of coherent phototoreceivers is constructed as an imager. Each photoreceiver comprises a local oscillator, a detector (mixer), an optical preamplifier (amplifier) and an electronic amplifier (TIA). A vertical cavity optical amplifier (VCSOA) is used either as the mixer or the preamplifier. The optical IF signal can be phase-shifted by 180° and detected to combine with the detected in-phase optical IF signal to obtain a balanced detector. The detector may use an avalanche photodiode with a trans-impedance amplifier for power reduction and higher gain.Type: ApplicationFiled: February 9, 2006Publication date: August 23, 2007Inventors: Ayub Fathimulla, Olaleye Aina, Harry Hior
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Publication number: 20070064296Abstract: A vertical cavity semiconductor optical photoamplifer (VCSOA) is used as a modulating retro-reflector (MRR) as a pixel in an array. The boundary of the cavity in the VCSOA forms a mirror for reflecting an incident light as an amplified output.Type: ApplicationFiled: December 9, 2004Publication date: March 22, 2007Inventors: Ayub Fathimulla, Harry Hier, Olaleye Aina
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Patent number: 6992319Abstract: Alternate layers of wide band gap and narrow band gaps of different kinds of semiconductors are used to form multiple channels of a FET. The channels are doped or formed as 2-DEG/2-DHG in narrow band semiconductor by charge supply layer in the wide band gap semiconductor. The different kinds of semiconductors form heterojunctions to confine the electrons/holes in separate thin spikes layers. A number of spikes (3–10 nm thick) of different doped or 2-DEG/2-DHG concentrations in various channels can result in overall electron concentration gradient such as a 1/x3 electron/hole concentrations profile. Such an electron/hole concentration gradient can result in a linear variation of drain current with voltage to obtain a wide dynamic range.Type: GrantFiled: June 24, 2002Date of Patent: January 31, 2006Assignee: Epitaxial TechnologiesInventors: Ayub M Fahimulla, Harry Stephen Hier, Olaleye A. Aina
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Patent number: 6987306Abstract: This invention describes an approach for monolithically integrating all the components of a photoreceiver—optical amplifier, optical band-pass filter, and photodiode module—on a single chip. The photoreceiver array employs unique optical amplifier and conversion technologies that provides the ultra-sensitivity required for free space optical communications networks. As an example, by monolithically integrating a vertical cavity surface emitting laser-diode (VCSEL) optical preamplifier with a photodiode receiver and related amplifiers and filters on the same chip, sensitivities as low as ?47 dBm (62 photons/bit at 2.5 Gb/s), along with an order of magnitude reduction in size, weight, and power consumption over comparable commercial-off-the-shelf (COTS) components can be demonstrated.Type: GrantFiled: July 17, 2003Date of Patent: January 17, 2006Assignee: Epitaxial TechnologiesInventors: Ayub M Fathimulla, Olaleye A. Aina, Harry Stephen Hier
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Publication number: 20050285098Abstract: Alternate layers of wide band gap and narrow band gaps of different kinds of semiconductors are used to form multiple channels of a FET. The channels are doped or formed as 2-DEG/2-DHG in narrow band semiconductor by charge supply layer in the wide band gap semiconductor. The different kinds of semiconductors form heterojunctions to confine the electrons/holes in separate thin spikes layers. A number of spikes (3-10 nm thick) of different doped or 2-DEG/2-DHG concentrations in various channels can result in overall electron concentration gradient such as a 1/x3 electron/hole concentrations profile. Such an electron/hole concentration gradient can result in a linear variation of drain current with voltage to obtain a wide dynamic range.Type: ApplicationFiled: August 18, 2005Publication date: December 29, 2005Inventors: Ayub Fathimulla, Harry Hier, Olaleye Aina
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Publication number: 20050082520Abstract: An integrated dual wavelength quantum-well infrared photodetector has two absorption peaks of photo response. The structure has a standard quantum well to yield a peak photo response at one wavelength and a sub-well to yield a peak photo response at a second wavelength. The standard quantum well and the sub-well is separated by a barrier. The barrier-well-subwell-well barrier layers are structured periodically. Additional quantum wells and sub-wells may be added to yield a multi-wavelength infrared photodetector.Type: ApplicationFiled: October 6, 2003Publication date: April 21, 2005Inventors: Ayub Fathimulla, Harry Hier, Olaleye Aina
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Publication number: 20050012106Abstract: This invention describes an approach for monolithically integrating all the components of a photoreceiver—optical amplifier, optical band-pass filter, and photodiode module—in a single chip. The photoreceiver array employs unique optical amplifier and conversion technologies that provides the ultra-sensitivity required for free space optical communications networks. As an example, by monolithically integrating a vertical cavity surface emitting laser-diode (VCSEL) optical preamplifier with a photodiode receiver and related amplifiers and filters on the same chip, sensitivities as low as ?47 dBm (62 photons/bit at 2.5 Gb/s), along with an order of magnitude reduction in size, weight, and power consumption over comparable commercial-off-the-shelf (COTS) components can be demonstrated.Type: ApplicationFiled: July 17, 2003Publication date: January 20, 2005Inventors: Ayub Fathimulla, Olaleye Aina, Harry Hier
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Publication number: 20020185655Abstract: Alternate layers of wide band gap and narrow band gaps of different kinds of semiconductors are used to form multiple channels of a FET. The channels are doped or formed as 2-DEG/2-DHG in narrow band semiconductor by charge supply layer in the wide band gap semiconductor. The different kinds of semiconductors form heterojunctions to confine the electrons/holes in separate thin spikes layers. A number of spikes (3-10 nm thick) of different doped or 2-DEG/2-DHG concentrations in various channels can result in overall electron concentration gradient such as a 1/x3electron/hole concentrations profile. Such an electron/hole concentration gradient can result in a linear variation of drain current with voltage to obtain a wide dynamic range.Type: ApplicationFiled: June 24, 2002Publication date: December 12, 2002Inventors: Ayub M. Fahimulla, Harry Stephen Hier, Olaleye A. Aina
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Patent number: 6407439Abstract: More than one photodetectors, each sensitive to different wavelengths, are integrated on a common semiconductor substrate. The different photodetectors can be stacked over one another or placed laterally on the common substrate. Gratings may be placed over each photodetector to sharpen the spectral response. Three such photodetectors can form a pixel of an active matrix array for an image sensor. The different photodetectors in each pixel can be multiplexed electronically. The electronic circuits for activating the different photodetectors can be integrated on the same substrate.Type: GrantFiled: August 19, 1999Date of Patent: June 18, 2002Assignee: Epitaxial Technologies, LLCInventors: Harry S. Hier, Olaleye A Aina
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Patent number: 5683936Abstract: A process to fabricate a specified height and cross-section of Microwave Monolithic Integrated Circuit gold posts comprising a patterned conductive substrate overlayed by an adhesive layer, a matrix layer, and a photoresist layer. Using photolithographic techniques, gold post locations are defined in the photoresist layer. m Gold post locations and cross-sections are defined in the matrix layer. The adhesive layer at the gold post locations is removed. The gold post locations are plated to form gold posts. The matrix is etched and the adhesive is dissolved.Type: GrantFiled: January 27, 1995Date of Patent: November 4, 1997Assignee: The Whitaker CorporationInventors: Krishna Pande, Olaleye A. Aina, Orlando E. Asuncion, Fred R. Phelleps, Jay Mathews, Richard Dean
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Patent number: 5242843Abstract: A method for making a heterojunction bipolar transistor in which the collector (46) is epitaxially grown on the subcollector layer (36) through a hole (42) formed in a layer of insulating material (40) deposited on the subcollector layer (36). A base (48) is epitaxially grown on the collector (46). Because of unequal lateral and vertical growth rates, the peripheral region of the base extends over the layer of insulating material. The n and n.sup.+ layers (50, 52) of the second type of semiconducting material are sequentially grown on the base and an n.sup.+ layer (54) of the first type of semiconducting material is grown on the sequentially grown layers (50, 52). The n.sup.+ layer (54) and the sequentially grown layer (50, 52) are etched to form an emitter mesa over the collector (46) leaving exposed the peripheral portion of the base (48) extending over the layer of insulating material surrounding the hole (42).Type: GrantFiled: October 28, 1992Date of Patent: September 7, 1993Assignee: Allied-Signal Inc.Inventor: Olaleye A. Aina
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Patent number: 5208462Abstract: A phosphor is placed on a light emitting surface of a solid state optical source. The phosphor absorbs the narrow bandwidth light from the optical source, and emits light that has a wide bandwidth. A lens is used to collect and focus the wide bandwidth light.Type: GrantFiled: December 19, 1991Date of Patent: May 4, 1993Assignee: Allied-Signal Inc.Inventors: James M. O'Connor, Olaleye A. Aina
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Patent number: 5187110Abstract: A high frequency amplifying device comprises a field effect transistor-bipolar transistor darlington pair. Such a device combines the main desirable features of both field effect transistors and bipolar transistors, therefore, having a high input impedance that is typical of FETs and a high transconductance (or high current gain) which is typical of bipolar transistors.Type: GrantFiled: November 13, 1991Date of Patent: February 16, 1993Assignee: Allied-Signal Inc.Inventors: Olaleye A. Aina, Eric A. Martin
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Patent number: 5086282Abstract: A high frequency amplifying device comprises a field effect transistor-bipolar transistor darlington pair. Such a device combines the main desirable features of both field effect transistors and bipolar transistors, therefore, having a high input impedance that is typical of FETs and a high transconductance (or high current gain) which is typical of bipolar transistors.Type: GrantFiled: October 5, 1990Date of Patent: February 4, 1992Assignee: Allied-Signal Inc.Inventors: Olaleye A. Aina, Eric A. Martin
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Patent number: 4960718Abstract: An InP MESFET having a semiconductor surface barrier layer formed of GaInP or AlInP. The semiconductor surface barrier layer is formed between an active layer and a gate electrode and the barrier height of the gate for the semiconductor surface barrier layer is higher than the barrier height of the gate for InP. In a method of forming an InP MESFET according to the present invention, the semiconductor surface barrier layer is formed by high dose implantation of Ga or Al into the active region. Surface barrier layers formed of other compounds, for example GaInAsP or AlInAsP, which have a lattice match with InP can be formed by other methods such as epitaxial growth.Type: GrantFiled: July 5, 1988Date of Patent: October 2, 1990Assignee: Allied-Signal Inc.Inventor: Olaleye A. Aina
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Patent number: 4662060Abstract: A method of forming a semiconductor device having a non-alloyed contact layer. An active region is formed in a substrate and the non-alloyed contact layer is formed in the active region, the barrier height of source and drain electrodes for the non-alloyed contact layer being lower than the barrier height of the source and drain electrodes for the active region or the substrate. The preferred method of forming the non-alloyed contact layer is high dose implantation of an element selected in accordance with the substrate material. For example, if the substrate is GaAs the non-alloyed contact layer is formed by implanting In, and if the substrate is InP the non-alloyed contact layer is formed by implanting As or Sb.Type: GrantFiled: December 13, 1985Date of Patent: May 5, 1987Assignee: Allied CorporationInventors: Olaleye A. Aina, Amir A. Lakhani