Abstract: The sum interval detector has two n-bit inputs, a 1-bit carry input, and a 1-bit output, which is activated when the sum of the input values lies within the interval −2p . . . 2p−1 or the like. The circuit utilizes a known method to detect whether a sum is equal to a constant to detect whether the upper n−p bits of the sum are binary 000 . . . 0, i.e. 0, or binary 111 . . . 1, i.e. −1, while the lower p bits of the sum are ignored corresponding to XXX . . . X. The method requires that the carry at position p be known which occurs with a well known, fast carry look-ahead circuit. By adding inverters and two levels of full adders the sum interval detector is capable of deciding whether two effective addresses, which each is a sum of base address plus offset, are so close, that the associated data areas overlap.