Abstract: A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material.

Abstract: A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer and methods for making structural capacitors are provided. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material.

Abstract: A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material.