Abstract: In a first area of a persistent memory, data is stored that defines a known good state that is operable to launch the computing device to the known good state in response to a reboot. In response to a write request to the first area of persistent memory, the requested write is directed to a second area of the persistent memory and a record of redirected writes to the second area of persistent memory is updated. A request is received to establish an update to the known good state. The updated known good state is operable to launch the computing device to the updated known good state in response to a reboot. In response to the request, the record is persisted such that in response to a reboot, the record is usable to restore the redirected writes, thereby launching the computing device to the updated known good state.

Abstract: In a first area of a persistent memory, state data is stored that defines a known good state that is operable to launch a computing device to the known good state in response to a reboot. Allocation information indicative of free and allocated portions of the persistent memory is accessed. In response to a write request to the first area of persistent memory, when the write request is to an allocated portion of the persistent memory, the requested write is redirected to a second area of the persistent memory. A record of redirected writes to the second area of persistent memory is updated. When the write request is to a free portion of the persistent memory, the write request is allowed to be executed in the first area of persistent memory. The record of redirected writes is updated with the writes to the second area of persistent memory.

Abstract: In a first area of a persistent memory, data is stored that defines a known good state that is operable to launch the computing device to the known good state in response to a reboot. In response to a write request to the first area of persistent memory, the requested write is directed to a second area of the persistent memory and a record of redirected writes to the second area of persistent memory is updated. A request is received to establish an update to the known good state. The updated known good state is operable to launch the computing device to the updated known good state in response to a reboot. In response to the request, the record is persisted such that in response to a reboot, the record is usable to restore the redirected writes, thereby launching the computing device to the updated known good state.

Abstract: In a first area of a persistent memory, state data is stored that defines a known good state that is operable to launch a computing device to the known good state in response to a reboot. Allocation information indicative of free and allocated portions of the persistent memory is accessed. In response to a write request to the first area of persistent memory, when the write request is to an allocated portion of the persistent memory, the requested write is redirected to a second area of the persistent memory. A record of redirected writes to the second area of persistent memory is updated. When the write request is to a free portion of the persistent memory, the write request is allowed to be executed in the first area of persistent memory. The record of redirected writes is updated with the writes to the second area of persistent memory.

Abstract: Techniques and systems for prescheduling an alternative CPU as soon as a need for a task is detected by a primary CPU are disclosed. A process includes detecting, by a producer thread running on a first CPU, an external interrupt, acquiring, by the producer thread, a spinlock, and in response to acquiring the spinlock, sending, by the producer thread, an event to a consumer thread that is to run on a second CPU. Upon receiving the event by the consumer thread, the consumer thread acquires the spinlock, which “stalls” the consumer thread in a loop until the spinlock is released by the producer thread. While the consumer thread is “waking up” in response to receiving the event from the producer thread, the producer thread creates a task, publishes the task, and releases the spinlock, thereby causing the consumer thread to exit the loop, retrieve the task, and execute the task.

Abstract: Techniques and systems for prescheduling an alternative CPU as soon as a need for a task is detected by a primary CPU are disclosed. A process includes detecting, by a producer thread running on a first CPU, an external interrupt, acquiring, by the producer thread, a spinlock, and in response to acquiring the spinlock, sending, by the producer thread, an event to a consumer thread that is to run on a second CPU. Upon receiving the event by the consumer thread, the consumer thread acquires the spinlock, which “stalls” the consumer thread in a loop until the spinlock is released by the producer thread. While the consumer thread is “waking up” in response to receiving the event from the producer thread, the producer thread creates a task, publishes the task, and releases the spinlock, thereby causing the consumer thread to exit the loop, retrieve the task, and execute the task.

Abstract: A fault or an exception is injected into a target thread. Instructions are processed and a target thread is recognized. As a result, an asynchronous procedure call is queued. The asynchronous procedure call is run on the target thread and the context of the target thread is modified. The target thread is executed in the modified context and an exception is raised in the target thread as a result of the modified context. The exception is handled and processing of the instruction continues.

Abstract: A fault or an exception is injected into a target thread. Instructions are processed and a target thread is recognized. As a result, an asynchronous procedure call is queued. The asynchronous procedure call is run on the target thread and the context of the target thread is modified. The target thread is executed in the modified context and an exception is raised in the target thread as a result of the modified context. The exception is handled and processing of the instruction continues.