Abstract: Embodiments of a method for fabricating an extreme ultraviolet (EUV) mask having a die pattern area are provided, as are embodiments of a method for fabricating an integrated circuit utilizing an EUV mask and embodiments of an EUV mask. In one embodiment, the EUV mask fabrication method includes obtaining an EUV mask blank including a substrate and a multi-layer (ML) reflector disposed over the substrate, and annealing localized portions of the ML reflector to produce an EUV light-absorptive border extending at least partially around an outer perimeter of the die pattern area.

Abstract: Embodiments of a method for fabricating an extreme ultraviolet (EUV) mask having a die pattern area are provided, as are embodiments of a method for fabricating an integrated circuit utilizing an EUV mask and embodiments of an EUV mask. In one embodiment, the EUV mask fabrication method includes obtaining an EUV mask blank including a substrate and a multi-layer (ML) reflector disposed over the substrate, and annealing localized portions of the ML reflector to produce an EUV light-absorptive border extending at least partially around an outer perimeter of the die pattern area.

Abstract: A composite exposure image is formed on a photoresist layer by applying a light beam through a reticle to form a first exposure image thereon, and thereafter, while maintaining the position of the reticle with respect to the photoresist layer, again applying a light beam through the reticle to form a second exposure image thereon. By adjusting the light beam differently in focus and intensity for each exposure, the combination of first and second exposure images form a pattern on the photoresist of lesser pitch than can be produced from a single exposure. The formation of a single pattern in the single resist layer from the two exposures avoids misalignment problems and eliminates the need for double exposure of a plurality of resist layers.