Abstract: An input-output port control subsystem for use with a computer system having separate source and destination buses incorporated therein. Said system including circuitry for controlling operations of said system and said input/output subsystem, said subsystem including a bidirectional input/output bus for transferring data to and from said system, and separate gating means for selectively connecting said source and destination buses to said bidirectional I/O bus. External devices are connected to said bus thru an adaptor unit which is directly connected to said processing system by appropriate control lines. The input/output subsystem is adapted to operate either under programmed I/O control mode thru the central processing system or in cycle steal mode wherein the I/O devices themselves request cycle steal service time on the I/O bus thru their connected adaptor.