Patents by Inventor Oliver Cozette

Oliver Cozette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10437639
    Abstract: In one embodiment, an application programming interface (API) is defined that enables a thread scheduler to communicate thread information to the CPU performance controller when dispatching a thread to a processor or processor core. When dispatching a thread, the scheduler may communicate thread information including thread state information, a general “importance” of the thread as defined by a priority level and/or quality of service (QoS) classification, a measurement of the scheduler dispatch latency for the thread, or architectural information regarding the instructions within the thread, such as whether the thread is contains 64-bit or 32-bit instructions. The performance controller can use the information provided by the scheduler to make performance control decisions for the processor cores within the system.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: October 8, 2019
    Assignee: Apple Inc.
    Inventors: Russell A. Blaine, Daniel A. Chimene, Shantonu Sen, John Dorsey, Bryan Hinch, Cyril De La Cropte De Chanterac, Oliver Cozette
  • Publication number: 20180088985
    Abstract: In one embodiment, an application programming interface (API) is defined that enables a thread scheduler to communicate thread information to the CPU performance controller when dispatching a thread to a processor or processor core. When dispatching a thread, the scheduler may communicate thread information including thread state information, a general “importance” of the thread as defined by a priority level and/or quality of service (QoS) classification, a measurement of the scheduler dispatch latency for the thread, or architectural information regarding the instructions within the thread, such as whether the thread is contains 64-bit or 32-bit instructions. The performance controller can use the information provided by the scheduler to make performance control decisions for the processor cores within the system.
    Type: Application
    Filed: October 17, 2017
    Publication date: March 29, 2018
    Inventors: Russell A. Blaine, Daniel A. Chimene, Shantonu Sen, John Dorsey, Bryan Hinch, Cyril De La Cropte De Chanterac, Oliver Cozette