Patents by Inventor Oliver G. Schlag

Oliver G. Schlag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Switch failover control in a multiprocessor computer system
    Patent number: 8677180
    Abstract: A system and a method for failover control comprising: maintaining a primary device table entry (DTE) in a first table activated for a first adapter in communication with a first processor node having a first root complex via a first switch assembly and maintaining a secondary DTE in standby for a second adapter in communication with a second processor node having a second root complex via a second switch assembly; maintaining a primary DTE in a second table activated for the second adapter and maintaining a secondary DTE in standby for the first adapter; and upon a failover, updating the secondary DTE in the first table as an active entry for the second adapter and forming a path to enable traffic to route from the second adapter through the second switch assembly over to the first switch assembly and up to the first root complex of the first processor node.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gerd K. Bayer, David F. Craddock, Thomas A. Gregg, Michael Jung, Andreas Kohler, Elke G. Nass, Oliver G. Schlag, Peter K. Szwed
  • SWITCH FAILOVER CONTROL IN A MULTIPROCESSOR COMPUTER SYSTEM
    Publication number: 20110320861
    Abstract: A system and a method for failover control comprising: maintaining a primary device table entry (DTE) in a first table activated for a first adapter in communication with a first processor node having a first root complex via a first switch assembly and maintaining a secondary DTE in standby for a second adapter in communication with a second processor node having a second root complex via a second switch assembly; maintaining a primary DTE in a second table activated for the second adapter and maintaining a secondary DTE in standby for the first adapter; and upon a failover, updating the secondary DTE in the first table as an active entry for the second adapter and forming a path to enable traffic to route from the second adapter through the second switch assembly over to the first switch assembly and up to the first root complex of the first processor node.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerd K. Bayer, David F. Craddock, Thomas A. Gregg, Michael Jung, Andreas Kohler, Elke G. Nass, Oliver G. Schlag, Peter K. Szwed