Abstract: A tunnel transistor includes a first compound semiconductor, a second compound semiconductor on the first compound semiconductor, and a third compound semiconductor on the second compound semiconductor. A source extends through the second compound semiconductor into the first compound semiconductor. A drain spaced apart from the source extends through the third compound semiconductor into the second compound semiconductor. A first two-dimensional charge carrier gas extends in the first compound semiconductor from the source toward the drain and ends prior to reaching the drain. A second two-dimensional charge carrier gas extends in the second compound semiconductor from the drain toward the source and ends prior to reaching the source. A gate is over the first and second two-dimensional charge carrier gases. A corresponding method of manufacturing the tunnel transistor is also provided.

Abstract: A high electron mobility transistor includes a source, a gate and a drain, a first III-V semiconductor region, and a second III-V semiconductor region below the first III-V semiconductor region. The high electron mobility transistor further includes a compensation structure interposed between the first and second III-V semiconductor regions so that the first and second III-V semiconductor regions are spaced apart from one another by the compensation structure. The compensation structure has a different band gap than the first and second III-V semiconductor regions.

Abstract: A high electron mobility transistor includes a source, gate and drain, a first III-V semiconductor region having a two-dimensional electron gas (2DEG) which provides a first conductive channel controllable by the gate between the source and drain, and a second III-V semiconductor region below the first III-V semiconductor region and having a second conductive channel connected to the source or drain and not controllable by the gate. The first and second III-V semiconductor regions are spaced apart from one another by a region of the high electron mobility transistor having a different band gap than the first and second III-V semiconductor regions.

Abstract: A semiconductor device includes a semiconductor body having a compound semiconductor material on a substrate. The compound semiconductor material has a channel region. A source region extends to the compound semiconductor material. A drain region also extends to the compound semiconductor material and is spaced apart from the source region by the channel region. An insulating region is buried in the semiconductor body between the compound semiconductor material and the substrate in an active region of the semiconductor device. The active region includes the source, the drain and the channel region of the device. The insulating region is discontinuous over a length of the channel region between the source region and the drain region.

Abstract: A transistor device includes a compound semiconductor body, a normally-on high electron mobility field effect transistor (HEMT) formed in the compound semiconductor body and a protection device monolithically integrated in the same compound semiconductor body as the normally-on HEMT. The normally-on HEMT has a source, a drain, a gate, and a threshold voltage. The protection device has a source and a drain each shared with the normally-on HEMT, a gate and a positive threshold voltage that is less than a difference of the threshold voltage of the normally-on HEMT and a gate voltage used to turn off the normally-on HEMT. The protection device is operable to conduct current in a reverse direction when the normally-on HEMT is switched off. A transistor device including a normally-off HEMT and a monolithically integrated protection device is also provided.

Abstract: A tunnel transistor includes a first compound semiconductor, a second compound semiconductor on the first compound semiconductor, and a third compound semiconductor on the second compound semiconductor. A source extends through the second compound semiconductor into the first compound semiconductor. A drain spaced apart from the source extends through the third compound semiconductor into the second compound semiconductor. A first two-dimensional charge carrier gas extends in the first compound semiconductor from the source toward the drain and ends prior to reaching the drain. A second two-dimensional charge carrier gas extends in the second compound semiconductor from the drain toward the source and ends prior to reaching the source. A gate is over the first and second two-dimensional charge carrier gases. A corresponding method of manufacturing the tunnel transistor is also provided.

Abstract: A transistor device includes a high electron mobility field effect transistor (HEMT) and a protection device. The HEMT has a source, a drain and a gate. The HEMT switches on and conducts current from the source to the drain when a voltage applied to the gate exceeds a threshold voltage of the HEMT. The protection device is monolithically integrated with the HEMT so that the protection device shares the source and the drain with the HEMT and further includes a gate electrically connected to the source. The protection device conducts current from the drain to the source when the HEMT is switched off and a reverse voltage between the source and the drain exceeds a threshold voltage of the protection device. The protection device has a lower threshold voltage than the difference of the threshold voltage of the HEMT and a gate voltage used to turn off the HEMT.

Abstract: A transistor device includes a compound semiconductor body having a first surface and a two-dimensional charge carrier gas disposed below the first surface in the compound semiconductor body. The transistor device further includes a source in contact with the two-dimensional charge carrier gas and a drain spaced apart from the source and in contact with the two-dimensional charge carrier gas. A first passivation layer is in contact with the first surface of the compound semiconductor body, and a second passivation layer is disposed on the first passivation layer. The second passivation layer has a different etch rate selectivity than the first passivation layer. A gate extends through the second passivation layer into the first passivation layer.

Abstract: A transistor device includes a high electron mobility field effect transistor (HEMT) and a protection device. The HEMT has a source, a drain and a gate. The HEMT switches on and conducts current from the source to the drain when a voltage applied to the gate exceeds a threshold voltage of the HEMT. The protection device is monolithically integrated with the HEMT so that the protection device shares the source and the drain with the HEMT and further includes a gate electrically connected to the source. The protection device conducts current from the drain to the source when the HEMT is switched off and a reverse voltage between the source and the drain exceeds a threshold voltage of the protection device. The protection device has a lower threshold voltage than the difference of the threshold voltage of the HEMT and a gate voltage used to turn off the HEMT.

Abstract: Disclosed herein are embodiments of a normally-off compound semiconductor tunnel field effect transistor having a drive current above 100 mA per mm of gate length and a sub-threshold slope below 60 mV per decade at room temperature, and methods of manufacturing such a normally-off compound semiconductor tunnel transistor. The compound semiconductor tunnel field effect transistor is fast-switching and can be used for high voltage applications e.g. 30V up to 600V and higher.

Abstract: A semiconductor device includes a semiconductor body including a plurality of compound semiconductor layers and a two-dimensional charge carrier gas channel region formed in one of the compound semiconductor layers. The semiconductor device further includes a contact structure disposed in the semiconductor body. The contact structure includes a metal region and a doped region. The metal region extends into the semiconductor body from a first side of the semiconductor body to at least the compound semiconductor layer which includes the channel region. The doped region is formed in the semiconductor body between the metal region and the channel region so that the channel region is electrically connected to the metal region through the doped region.

Abstract: A semiconductor device such as a diode or transistor includes a semiconductor substrate, a first region of III-V semiconductor material on the semiconductor substrate and a second region of III-V semiconductor material on the first region. The second region is spaced apart from the semiconductor substrate by the first region. The second region is of a different composition than the first region. The semiconductor device further includes a buried contact extending from the semiconductor substrate to the second region through the first region. The buried contact electrically connects the second region to the semiconductor substrate.

Abstract: An embodiment of a transistor device includes a compound semiconductor material on a semiconductor carrier and a source region and a drain region spaced apart from each other in the compound semiconductor material with a channel region interposed between the source and drain regions. A Schottky diode is integrated with the semiconductor carrier, and contacts extend from the source and drain regions through the compound semiconductor material. The contacts are in electrical contact with the Schottky diode so that the Schottky diode is connected in parallel between the source and drain regions. In another embodiment, the integrated Schottky diode is formed by a region of doped amorphous silicon or doped polycrystalline silicon disposed in a trench structure on the drain side of the device.

Abstract: Disclosed herein are embodiments of a normally-off compound semiconductor tunnel field effect transistor having a drive current above 100 mA per mm of gate length and a sub-threshold slope below 60 mV per decade at room temperature, and methods of manufacturing such a normally-off compound semiconductor tunnel transistor. The compound semiconductor tunnel field effect transistor is fast-switching and can be used for high voltage applications e.g. 30V up to 600V and higher.

Abstract: A semiconductor device includes a first compound semiconductor material and a second compound semiconductor material on the first compound semiconductor material. The second compound semiconductor material comprises a different material than the first compound semiconductor material such that the first compound semiconductor material has a two-dimensional electron gas (2DEG). The semiconductor device further includes a buried field plate disposed in the first compound semiconductor material and electrically connected to a terminal of the semiconductor device. The 2DEG is interposed between the buried field plate and the second compound semiconductor material.

Abstract: A semiconductor device such as a diode or transistor includes a semiconductor substrate, a first region of III-V semiconductor material on the semiconductor substrate and a second region of III-V semiconductor material on the first region. The second region is spaced apart from the semiconductor substrate by the first region. The second region is of a different composition than the first region. The semiconductor device further includes a buried contact extending from the semiconductor substrate to the second region through the first region. The buried contact electrically connects the second region to the semiconductor substrate.

Abstract: A high electron mobility transistor includes a source, gate and drain, a first III-V semiconductor region having a two-dimensional electron gas (2DEG) which provides a first conductive channel controllable by the gate between the source and drain, and a second III-V semiconductor region below the first III-V semiconductor region and having a second conductive channel connected to the source or drain and not controllable by the gate. The first and second III-V semiconductor regions are spaced apart from one another by a region of the high electron mobility transistor having a different band gap than the first and second III-V semiconductor regions.

Abstract: A normally-off transistor includes a first region of III-V semiconductor material, a second region of III-V semiconductor material on the first region, a third region of III-V semiconductor material on the second region and a gate electrode adjacent at least one sidewall of the third region. The first region provides a channel of the transistor. The second region has a band gap greater than the band gap of the first region and causes a 2-D electron gas (2DEG) in the channel. The second region is interposed between the first region and the third region. The third region provides a gate of the transistor and has a thickness sufficient to deplete the 2DEG in the channel so that the transistor has a positive threshold voltage.

Abstract: In the case of the cost-effective method according to the invention for fabricating a power transistor arrangement, a trench power transistor arrangement (1) is fabricated with four patterning planes each containing a lithography step. The power transistor arrangement according to the invention has a cell array (3) with cell array trenches (5) each containing a field electrode structure (11) and a gate electrode structure (10). The field electrode structure (11) is electrically conductively connected to the source metallization (15) by a connection trench (6) in the cell array (3).

Abstract: When fabricating trench power transistor arrangements (1) with active cell array trenches (5) and passive connecting trenches (6), the cell array trenches (5) are provided in greater width than the connecting trenches (6). An auxiliary layer (24) is deposited conformally onto a lower field electrode structure (11) in the cell array trenches (5) and the connecting trenches (6) and is etched back as far as the top edge in the connecting trenches (6), which removes it from the cell array trenches (5). The auxiliary layer (24) allows the gate oxide (20) to be patterned without a complex mask process. An edge trench (7), with an electrode, on the potential of the field electrode structure (11) shields the cell array (3) from a drain potential.