Abstract: An apparatus (10) for checking a component (30) is disclosed. The apparatus (10) comprises a sample holder (20) with a module (28) for receiving at least one component (30), at least one magnetic field generator (60a, 60b, 60c) for generating a magnetic field around the module (28), an inlet (40) for feeding a tempered medium into the module (25), and an outlet (45) for discharging a tempered medium from the module (28).

Abstract: An apparatus (10) for checking a component (30) is disclosed. The apparatus (10) comprises a sample holder (20) with a module (28) for receiving at least one component (30), at least one magnetic field generator (60a, 60b, 60c) for generating a magnetic field around the module (28), an inlet (40) for feeding a tempered medium into the module (25), and an outlet (45) for discharging a tempered medium from the module (28).

Abstract: A method for testing a CMOS transistor with an electrical testing unit, the CMOS transistor being formed in a semiconductor substrate of a semiconductor wafer. A plurality of CMOS transistors are formed on the semiconductor wafer and the electrical testing unit has a support plate and a metal layer formed on the support plate. The CMOS transistor having a first terminal contact, a second terminal contact and a third terminal contact, the second terminal contact configured as an electrically open control contact and in a process step the metal layer is positioned above the semiconductor wafer over the control contact and a potential difference between the first terminal contact and a third terminal contact is generated. The control contact is capacitively coupled by applying a drive potential to the metal layer, and the function of the CMOS transistor is tested by measuring an electrical variable dependent on the capacitive coupling.

Abstract: A method for testing a CMOS transistor with an electrical testing unit, the CMOS transistor being formed in a semiconductor substrate of a semiconductor wafer. A plurality of CMOS transistors are formed on the semiconductor wafer and the electrical testing unit has a support plate and a metal layer formed on the support plate. The CMOS transistor having a first terminal contact, a second terminal contact and a third terminal contact, the second terminal contact configured as an electrically open control contact and in a process step the metal layer is positioned above the semiconductor wafer over the control contact and a potential difference between the first terminal contact and a third terminal contact is generated. The control contact is capacitively coupled by applying a drive potential to the metal layer, and the function of the CMOS transistor is tested by measuring an electrical variable dependent on the capacitive coupling.