Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.

Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.

Abstract: A flexible wire assembly includes a plurality of elongated conductors and insulators each having a quadrilateral cross section and alternatingly laminated together, the flexible wire assembly having a wire width measured across the conductor and insulators, a wire height equivalent to the height of the conductors and insulators, and a wire length which is measured in a longitudinal direction orthogonal to the wire width and the wire height, wherein the wire length is one or more orders of magnitude greater than the wire width and the wire height; and a first device comprising a plurality of bond pads spaced to define a bond pad pitch, wherein the flexible wire assembly is coupled to the first device at the bond pads such that spacing of the conductor conductors is matched to the bond pad pitch.

Abstract: An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.

Abstract: A modular sensor assembly comprises: sensor arrays electrically coupled to a sensor substrate; a plurality of integrated circuits with sensor signal processors electrically coupled to a package substrate; and an interconnect assembly including electrical paths configured to electrically couple analog output signals from a first sensor array to a first integrated circuit and from a second sensor to a second integrated circuit, the first sensor disposed adjacent to the second sensor.

Abstract: A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.

Abstract: A modular sensor assembly comprises: sensor arrays electrically coupled to a sensor substrate; a plurality of integrated circuits with sensor signal processors electrically coupled to a package substrate; and an interconnect assembly including electrical paths configured to electrically couple analog output signals from a first sensor array to a first integrated circuit and from a second sensor to a second integrated circuit, the first sensor disposed adjacent to the second sensor.

Abstract: A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.

Abstract: An interface assembly for a sensor array is provided. The interface assembly may be made up of an integrated circuit package thermally coupled to the sensor array. The interface assembly may include a temperature control system for controlling the temperature of the sensor array. The temperature control system includes a temperature sensor for sensing a temperature variation of each sensor of the sensor array from an initial temperature beyond a predetermined threshold. A temperature controller is coupled to each temperature sensor and receives an output signal from the temperature sensor upon the sensor temperature variation exceeding the predetermined threshold. A temperature correction device is coupled to each temperature controller and causes the sensor temperature variation to fall within the predetermined threshold upon receiving a control signal from the temperature controller.

Abstract: An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.

Abstract: An interface assembly for a sensor array is provided. The interface assembly may be made up of an integrated circuit package thermally coupled to the sensor array. The interface assembly may include a temperature control system for controlling the temperature of the sensor array. The temperature control system includes a temperature sensor for sensing a temperature variation of each sensor of the sensor array from an initial temperature beyond a predetermined threshold. A temperature controller is coupled to each temperature sensor and receives an output signal from the temperature sensor upon the sensor temperature variation exceeding the predetermined threshold. A temperature correction device is coupled to each temperature controller and causes the sensor temperature variation to fall within the predetermined threshold upon receiving a control signal from the temperature controller.

Abstract: An interface assembly for a sensor array is provided. The interface assembly may be made up of an integrated circuit package mounted on the sensor array. The package provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package supportingly adjoins the sensor array and provides a plurality of interfaces for interconnecting to at least one integrated circuit in the package a plurality of signals from the sensor array having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.

Abstract: An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.

Abstract: An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.

Abstract: An adaptive imaging system includes a detector receiving energy transmitted through a target and generating electrical charge pulses at a pulse rate indicative of an intensity of received energy. The system also includes a switch for selectively coupling the charge pulses from one or more pixel elements of the detector to a charge pulse counter for counting the charge pulses and a charge pulse integrator for integrating the charge pulses. In addition, the system includes a prediction module for predicting a charge pulse rate expected to be produced by the detector and for operating the switch to selectively couple the charge pulses to the counter and the integrator responsive to a predicted charge pulse rate.

Abstract: A multi-channel analog to digital conversion circuit and methods thereon are provided. The multi-channel analog to digital conversion cirucit comprises a plurality of linearized channels wherein each channel comprises a multi-stage pipelined charge-to-digital converter and an integrating capacitor within each stage of the multi-stage converter wherein analog residue is processed by subsequent analog to digital converter stages. Each stage of respective linearized channels is configured for calculating gain and offset for each stage in the channel and such gain and offset is used in subsequent integration periods.