Patents by Inventor Olivier Francis Cyrille Caty

Olivier Francis Cyrille Caty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Testing multi-core processors
    Patent number: 8214703
    Abstract: Methods and apparatuses are disclosed for testing multicore processors. In some embodiments, the tested multicore processor may include at least a first core and a second core, a data input coupled to a first scan chain in the first core and a second scan chain in the second core, and a multiplexer including at least a first input and a second input, the first input coupled with a data output of the first scan chain and the second input coupled with a data output of the second scan chain, the multiplexer further including an output that couples to one or more pins on a package of the processor, the multiplexer further including a select signal that couples to the one or more pins on the package of the processor, and wherein the data input couples to the one or more pins on the package of the processor.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: July 3, 2012
    Assignee: Oracle America, Inc.
    Inventors: Murali Mohan Reddy Gala, Olivier Francis Cyrille Caty, Thomas Alan Ziaja, Paul Dickinson
  • TESTING MULTI-CORE PROCESSORS
    Publication number: 20100235683
    Abstract: Methods and apparatuses are disclosed for testing multicore processors. In some embodiments, the tested multicore processor may include at least a first core and a second core, a data input coupled to a first scan chain in the first core and a second scan chain in the second core, and a multiplexer including at least a first input and a second input, the first input coupled with a data output of the first scan chain and the second input coupled with a data output of the second scan chain, the multiplexer further including an output that couples to one or more pins on a package of the processor, the multiplexer further including a select signal that couples to the one or more pins on the package of the processor, and wherein the data input couples to the one or more pins on the package of the processor.
    Type: Application
    Filed: March 10, 2009
    Publication date: September 16, 2010
    Applicant: Sun Microsystems, Inc.
    Inventors: Murali Mohan Reddy Gala, Olivier Francis Cyrille Caty, Thomas Alan Ziaja, Paul John Dickinson