Patents by Inventor Olivier Hinsinger

Olivier Hinsinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10892292
    Abstract: A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: January 12, 2021
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Daniel Benoit, Olivier Hinsinger, Emmanuel Gourvest
  • Publication number: 20200403154
    Abstract: A memory cell includes a heating element topped with a phase-change material. Two first silicon oxide regions laterally surround the heating element along a first direction. Two second silicon oxide regions laterally surround the heating element along a second direction orthogonal to the first direction. Top surfaces of the heating element and the two first silicon oxide regions are coplanar such that the heating element and the two first silicon oxide regions have a same thickness.
    Type: Application
    Filed: September 4, 2020
    Publication date: December 24, 2020
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Olivier HINSINGER
  • Patent number: 10797234
    Abstract: A memory cell includes a heating element topped with a phase-change material. Two first silicon oxide regions laterally surround the heating element along a first direction. Two second silicon oxide regions laterally surround the heating element along a second direction orthogonal to the first direction. Top surfaces of the heating element and the two first silicon oxide regions are coplanar such that the heating element and the two first silicon oxide regions have a same thickness.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: October 6, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Olivier Hinsinger
  • Publication number: 20190244989
    Abstract: A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Daniel BENOIT, Olivier HINSINGER, Emmanuel GOURVEST
  • Publication number: 20190172795
    Abstract: An integrated circuit includes a solder pad which includes, in a superposition of metallization levels, an underlying structure formed by a network of first regular metal tracks that are arranged for reinforcing the mechanical strength of the underlying structure and electrically connecting between an upper metallization level and a lower metallization level of the underlying structure. The underlying structure further includes a detection electrical path formed by second metal tracks passing between the first metal tracks in the metallization levels, the detection electrical path having an input terminal and an output terminal. Electrical sensing of the detection electrical path is made to supply a measurement which is indicative of the presence of cracks in the underlying structure.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 6, 2019
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Eric SABOURET, Krysten ROCHEREAU, Olivier HINSINGER, Flore PERSIN-CRELEROT
  • Patent number: 10304893
    Abstract: A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: May 28, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Daniel Benoit, Olivier Hinsinger, Emmanuel Gourvest
  • Publication number: 20190140176
    Abstract: An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 9, 2019
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS
    Inventors: Franck ARNAUD, David GALPIN, Stephane ZOLL, Olivier HINSINGER, Laurent FAVENNEC, Jean-Pierre ODDOU, Lucile BROUSSOUS, Philippe BOIVIN, Olivier WEBER, Philippe BRUN, Pierre MORIN
  • Publication number: 20190140175
    Abstract: A memory cell includes a heating element topped with a phase-change material. Two first silicon oxide regions laterally surround the heating element along a first direction. Two second silicon oxide regions laterally surround the heating element along a second direction orthogonal to the first direction. Top surfaces of the heating element and the two first silicon oxide regions are coplanar such that the heating element and the two first silicon oxide regions have a same thickness.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 9, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Olivier HINSINGER
  • Publication number: 20180102385
    Abstract: A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.
    Type: Application
    Filed: May 11, 2017
    Publication date: April 12, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Daniel Benoit, Olivier Hinsinger, Emmanuel Gourvest
  • Patent number: 9647724
    Abstract: A wireless unit includes a first motion sensitive device; communications circuitry for wirelessly communicating with a further wireless unit; and a processing device configured to compare at least one first motion vector received from the first motion sensitive device with at least one second motion vector received from a second motion sensitive device of the further wireless unit.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: May 9, 2017
    Assignees: STMicroelectronics SA, STMicroeletronics (Crolles 2) SAS
    Inventors: Pascal Urard, Christophe Regnier, Daniel Gloria, Olivier Hinsinger, Philippe Cavenel, Lionel Balme
  • Patent number: 9006851
    Abstract: A stand-alone device comprising a silicon wafer having its front surface including a first layer of a first conductivity type and a second layer of a second conductivity type forming a photovoltaic cell; first vias crossing the wafer from the rear surface of the first layer and second vias crossing the wafer from the rear surface of the second layer; metallization levels on the rear surface of the wafer, the external level of these metallization levels defining contact pads; an antenna formed in one of the metallization levels; and one or several chips assembled on said pads; the metallization levels being shaped to provide selected interconnects between the different elements of the device.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: April 14, 2015
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Christophe Regnier, Olivier Hinsinger, Daniel Gloria, Pascal Urard
  • Publication number: 20120032291
    Abstract: A stand-alone device comprising a silicon wafer having its front surface including a first layer of a first conductivity type and a second layer of a second conductivity type forming a photovoltaic cell; first vias crossing the wafer from the rear surface of the first layer and second vias crossing the wafer from the rear surface of the second layer; metallization levels on the rear surface of the wafer, the external level of these metallization levels defining contact pads; an antenna formed in one of the metallization levels; and one or several chips assembled on said pads; the metallization levels being shaped to provide selected interconnects between the different elements of the device.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 9, 2012
    Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Christophe Regnier, Olivier Hinsinger, Daniel Gloria, Pascal Urard