Patents by Inventor Olivier Kermarrec

Olivier Kermarrec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8178426
    Abstract: A method for manufacturing an insulated semiconductor layer, including: forming a porous silicon layer on a single-crystal silicon surface; depositing an insulating material so that it penetrates into the pores of the porous silicon layer; eliminating the insulating material to expose the upper surface of the porous silicon; and growing by epitaxy a semiconductor layer.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: May 15, 2012
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Aomar Halimaoui, Yves Morand, Yves Campidelli, Olivier Kermarrec
  • Publication number: 20110108801
    Abstract: A single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 12, 2011
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Yves Campidelli, Olivier Kermarrec
  • Publication number: 20080197447
    Abstract: A method for manufacturing an insulated semiconductor layer, including: forming a porous silicon layer on a single-crystal silicon surface; depositing an insulating material so that it penetrates into the pores of the porous silicon layer; eliminating the insulating material to expose the upper surface of the porous silicon; and growing by epitaxy a semiconductor layer.
    Type: Application
    Filed: February 14, 2008
    Publication date: August 21, 2008
    Applicants: STMicroelectronics S.A., STMicroelectronics Crolles 2 SAS
    Inventors: Aomar Halimaoui, Yves Morand, Yves Campidelli, Olivier Kermarrec
  • Patent number: 7381267
    Abstract: A method for forming, by epitaxy, a heteroatomic single-crystal semiconductor layer on a single-crystal semiconductor wafer, the crystal lattices of the layer and of the wafer being different, including forming, before the epitaxy, in the wafer surface, at least one ring of discontinuities around a useful region.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: June 3, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Morand, Yves Campidelli, Vincent Cosnier
  • Publication number: 20070248818
    Abstract: The invention relates to a single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism
    Type: Application
    Filed: December 16, 2004
    Publication date: October 25, 2007
    Applicant: STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Yves Campidelli, Olivier Kermarrec
  • Patent number: 7129563
    Abstract: A process and a device for fabricating a semiconductor device having a gate dielectric made of high-k material, includes a step of depositing, directly on the gate dielectric, a first layer of Si1?xGex, where 0.5<x?1, at a temperature substantially below the temperature at which a poly-Si is deposited by thermal chemical vapor deposition (CVD).
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: October 31, 2006
    Assignee: STMicroelectronics SA
    Inventors: Vincent Cosnier, Yves Morand, Olivier Kermarrec, Daniel Bensahel, Yves Campidelli
  • Publication number: 20040256699
    Abstract: A process and a device for fabricating a semiconductor device having a gate dielectric made of high-k material, includes a step of depositing, directly on the gate dielectric, a first layer of Si1-xGex, where 0.5<x<1, at a temperature substantially below the temperature at which a poly-Si is deposited by thermal chemical vapor deposition (CVD).
    Type: Application
    Filed: April 1, 2004
    Publication date: December 23, 2004
    Applicant: STMICROELECTRONICS SA
    Inventors: Vincent Cosnier, Yves Morand, Olivier Kermarrec, Daniel Bensahel, Yves Campidelli
  • Publication number: 20040250752
    Abstract: A method for forming, by epitaxy, a heteroatomic single-crystal semiconductor layer on a single-crystal semiconductor wafer, the crystal lattices of the layer and of the wafer being different, including forming, before the epitaxy, in the wafer surface, at least one ring of discontinuities around a useful region.
    Type: Application
    Filed: April 1, 2004
    Publication date: December 16, 2004
    Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Morand, Yves Campidelli, Vincent Cosnier
  • Patent number: 6596555
    Abstract: A method of forming, on a single-crystal semiconductor substrate of a first material, quantum dots of a second material, including growing by vapor phase epitaxy the second material on the first material in optimal conditions adapted to ensuring a growth at a maximum controllable rate. In an initial step, a puff of a gas containing the second material is sent on the substrate, in conditions corresponding to a deposition rate much faster than the maximum controllable rate.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: July 22, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Campidelli
  • Publication number: 20020039833
    Abstract: A method of forming, on a single-crystal semiconductor substrate of a first material, quantum dots of a second material, including growing by vapor phase epitaxy the second material on the first material in optimal conditions adapted to ensuring a growth at a maximum controllable rate. In an initial step, a puff of a gas containing the second material is sent on the substrate, in conditions corresponding to a deposition rate much faster than the maximum controllable rate.
    Type: Application
    Filed: August 3, 2001
    Publication date: April 4, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Campidelli