Patents by Inventor Olivier Ladiray

Olivier Ladiray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7091633
    Abstract: A circuit of interface between a logic sensor and a logic input isolation barrier of a processing circuit, including an element of protection against input overvoltages, a current-limiting circuit connected in series between an input terminal and an output terminal of the interface circuit, and a control stage connected in parallel with the galvanic isolation element to be controlled to control the logic states thereof, the control stage inhibiting the operation of the galvanic isolation element if the input current is smaller than a predetermined threshold.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: August 15, 2006
    Assignee: STMicroelectronics S.A.
    Inventors: Thierry Castagnet, Olivier Ladiray
  • Patent number: 6927427
    Abstract: A monolithic bidirectional switch formed in an N-type semiconductor substrate, including, in a first area, a first vertical thyristor adjacent to a second vertical thyristor; a triggering area arranged on the front surface side, apart from the first area, including a P-type well in which is formed an N-type region; a first metallization covering the rear surface; a second metallization on the front surface layers of the first and second thyristors; a third gate metallization on said well; on the rear surface side, an additional P-type region and an insulating layer interposed between this additional region and the first metallization, the additional region extending under the triggering area; and a fourth metallization on the region.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: August 9, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Olivier Ladiray
  • Patent number: 6882180
    Abstract: The invention concerns a switching circuit (20) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN2) whereof the transmitter is connected to the input terminal; a second transistor (TP2) whereof a control electrode is connected, through a first resistor (Re2), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp2); and a third transistor (TN3) connecting an output terminal (22) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN2).
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: April 19, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Franck Duclos, Olivier Ladiray, Jérôme Heurtier
  • Publication number: 20040021487
    Abstract: The invention concerns a switching circuit (20) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN2) whereof the transmitter is connected to the input terminal; a second transistor (TP2) whereof a control electrode is connected, through a first resistor (Re2), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp2); and a third transistor (TN3) connecting an output terminal (22) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN2).
    Type: Application
    Filed: April 29, 2003
    Publication date: February 5, 2004
    Inventors: Franck Duclos, Olivier Ladiray, Jerome Heurtier
  • Patent number: 6593600
    Abstract: A monolithic bidirectional switch formed in a semiconductor substrate of type N, including a first main vertical thyristor, the rear surface layer of which is of type P, a second main vertical thyristor, the rear surface layer of which is of type N, an auxiliary vertical thyristor, the rear surface layer of which is of type P and is common with that of the first main thyristor, a peripheral region of type P especially connecting the rear surface layer of the auxiliary thyristor to the layer of this thyristor located on the other side of the substrate, a first metallization on the rear surface side, a second metallization on the front surface side connecting the front surface layers of the first and second thyristors. An additional region has a function of isolating the rear surface of the auxiliary thyristor and the first metallization.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: July 15, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Franck Duclos, Jean-Michel Simonnet, Olivier Ladiray
  • Publication number: 20030122211
    Abstract: A monolithic bidirectional switch formed in an N-type semiconductor substrate, including, in a first area, a first vertical thyristor adjacent to a second vertical thyristor; a triggering area arranged on the front surface side, apart from the first area, including a P-type well in which is formed an N-type region; a first metallization covering the rear surface; a second metallization on the front surface layers of the first and second thyristors; a third gate metallization on said well; on the rear surface side, an additional P-type region and an insulating layer interposed between this additional region and the first metallization, the additional region extending under the triggering area; and a fourth metallization on the region.
    Type: Application
    Filed: December 19, 2002
    Publication date: July 3, 2003
    Inventor: Olivier Ladiray
  • Patent number: 6583496
    Abstract: A monolithic component including two thyristors of a composite bridge connected to an A.C. voltage terminal by a common terminal corresponding to a common rear surface metallization forming an electrode of opposite biasing of each thyristor. An isolating wall separates a substrate in two portions, a first portion includes on its lower surface side an anode region and on its upper surface side a cathode region, the second portion includes on its lower surface side a cathode region and on its upper surface side an anode region. The isolating wall surrounding each of the components extending towards the main electrode on the side which carries no common metallization and including in this extended region an N-type area, the two areas being connected together to a common control terminal.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: June 24, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Franck Galtie, Olivier Ladiray
  • Publication number: 20030048008
    Abstract: A circuit of interface between a logic sensor and a logic input isolation barrier of a processing circuit, including an element of protection against input overvoltages, a current-limiting circuit connected in series between an input terminal and an output terminal of the interface circuit, and a control stage connected in parallel with the galvanic isolation element to be controlled to control the logic states thereof, the control stage inhibiting the operation of the galvanic isolation element if the input current is smaller than a predetermined threshold.
    Type: Application
    Filed: September 12, 2002
    Publication date: March 13, 2003
    Inventors: Thierry Castagnet, Olivier Ladiray
  • Patent number: 6469556
    Abstract: A pulse-controlled analog flip-flop includes a charge element; a charge storage element connected to the charge element; an element for detecting the voltage across the storage element; and an element for discharging the storage element when the detection element has detected that the voltage across the storage element has reached a predetermined threshold.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: October 22, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Olivier Ladiray
  • Patent number: 6380565
    Abstract: A monolithic bidirectional switch formed in a semiconductor substrate of a first conductivity type having a front surface and a rear surface, including a first main vertical thyristor, the rear surface layer of which is of the second conductivity type, a second main vertical thyristor, the rear surface layer of which is of the first conductivity type. A structure for triggering each of the first and second main thyristors is arranged to face regions mutually distant from the two main thyristors, the neighboring portions of which correspond to a region for which, for the first main thyristor, a short-circuit area between cathode and cathode gate is formed.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 30, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Franck Duclos, Jean-Michel Simonnet, Olivier Ladiray
  • Patent number: 6369640
    Abstract: A zero crossing control circuit of a bidirectional switch including two transistors of complementary types connected in parallel between the gate of the bidirectional switch and the main reference terminal of the bidirectional switch, the gate of the bidirectional switch being connected to a control source via a first resistor, and each of the control terminals of the transistors being connected to the second main terminal of the bidirectional switch via a second resistor of high value, a zener diode being interposed between the second resistor and each of the control terminals according to a biasing adapted to turning on each of the transistors when the zener threshold is exceeded.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: April 9, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Franck Duclos, Olivier Ladiray, Jean-Michel Simonnet
  • Publication number: 20020008247
    Abstract: A monolithic component including two thyristors of a composite bridge connected to an A.C. voltage terminal by a common terminal corresponding to a common rear surface metallization forming an electrode of opposite biasing of each thyristor. An isolating wall separates a substrate in two portions, a first portion includes on its lower surface side an anode region and on its upper surface side a cathode region, the second portion includes on its lower surface side a cathode region and on its upper surface side an anode region. The isolating wall surrounding each of the components extending towards the main electrode on the side which carries no common metallization and including in this extended region an N-type area, the two areas being connected together to a common control terminal.
    Type: Application
    Filed: May 2, 2001
    Publication date: January 24, 2002
    Inventors: Franck Galtie, Olivier Ladiray
  • Patent number: 6252451
    Abstract: A one-way switching circuit of the type including a gate tun-off thyristor biased to be normally on, further includes, between the gate and a supply line, a capacitor and a controllable switch connected in parallel.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: June 26, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Fabrice Guitton, Didier Magnon, Jean-Michel Simonnet, Olivier Ladiray
  • Publication number: 20010004193
    Abstract: A pulse-controlled analog flip-flop including a charge element; a charge storage element connected to the charge element; an element for detecting the voltage across the storage element; and an element for discharging the storage element when the detection element has detected that the voltage across the storage element has reached a predetermined threshold.
    Type: Application
    Filed: December 12, 2000
    Publication date: June 21, 2001
    Inventor: Olivier Ladiray